From: Krzysztof Kozlowski <krzk@kernel.org>
To: Jessica Zhang <jessica.zhang@oss.qualcomm.com>,
Rob Clark <robin.clark@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Abel Vesa <abel.vesa@linaro.org>
Subject: Re: [PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge
Date: Fri, 10 Oct 2025 10:14:00 +0200 [thread overview]
Message-ID: <1154f275-f934-46ae-950a-209d31463525@kernel.org> (raw)
In-Reply-To: <20250923-modeclk-fix-v2-1-01fcd0b2465a@oss.qualcomm.com>
On 24/09/2025 01:03, Jessica Zhang wrote:
> Since 3D merge allows for larger modes to be supported across 2 layer
> mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
> supported.
>
> Reported-by: Abel Vesa <abel.vesa@linaro.org>
> Fixes: 62b7d6835288 ("drm/msm/dpu: Filter modes based on adjusted mode clock")
> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> ---
> Changes in v2:
Fixes display on SM8750 MTP:
Tested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-10-10 8:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-23 23:03 Jessica Zhang
2025-09-24 21:25 ` Dmitry Baryshkov
2025-09-25 6:51 ` Abel Vesa
2025-09-25 22:22 ` Dmitry Baryshkov
2025-09-26 6:42 ` Abel Vesa
2025-09-26 11:56 ` Abel Vesa
2025-10-10 8:14 ` Krzysztof Kozlowski [this message]
2025-10-29 0:30 ` Dmitry Baryshkov
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