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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: "Herve Codina" <herve.codina@bootlin.com>,
	"Marek Vasut" <marek.vasut+renesas@gmail.com>,
	"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Magnus Damm" <magnus.damm@gmail.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Krzysztof Wilczyński" <kw@linux.com>
Cc: Rob Herring <robh@kernel.org>,
	linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Sergey Shtylyov <s.shtylyov@omp.ru>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Clement Leger <clement.leger@bootlin.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: Re: [PATCH v4 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032
Date: Sun, 1 May 2022 10:45:06 +0200	[thread overview]
Message-ID: <1179dd78-b2c0-4c2d-edef-b4903586950a@linaro.org> (raw)
In-Reply-To: <20220428151630.586009-3-herve.codina@bootlin.com>

On 28/04/2022 17:16, Herve Codina wrote:
> Add internal PCI bridge support for the r9a06g032 SOC. The Renesas
> RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one
> present in the R-Car Gen2 family.
> Compared to the R-Car Gen2 family, it needs three clocks instead of
> one.
> 
> The 'resets' property for the RZ/N1 family is not required since
> there is no reset-controller support yet for the RZ/N1 family.
> 
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> ---
>  .../bindings/pci/renesas,pci-rcar-gen2.yaml   | 46 ++++++++++++++++---
>  1 file changed, 39 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
> index 494eb975c146..90b42d44c582 100644
> --- a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
> +++ b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
> @@ -32,6 +32,10 @@ properties:
>                - renesas,pci-r8a7793      # R-Car M2-N
>                - renesas,pci-r8a7794      # R-Car E2
>            - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
> +      - items:
> +          - enum:
> +              - renesas,pci-r9a06g032     # RZ/N1D
> +          - const: renesas,pci-rzn1       # RZ/N1
>  
>    reg:
>      items:
> @@ -41,13 +45,9 @@ properties:
>    interrupts:
>      maxItems: 1
>  
> -  clocks:
> -    items:
> -      - description: Device clock
> +  clocks: true
>  
> -  clock-names:
> -    items:
> -      - const: pclk
> +  clock-names: true
>  
>    resets:
>      maxItems: 1
> @@ -106,13 +106,45 @@ required:
>    - interrupt-map
>    - interrupt-map-mask
>    - clocks
> -  - resets
>    - power-domains
>    - bus-range
>    - "#address-cells"
>    - "#size-cells"
>    - "#interrupt-cells"
>  
> +if:

This should be better within allOf block. It's likely that it will be
extended later.

Best regards,
Krzysztof

  parent reply	other threads:[~2022-05-01  8:46 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-28 15:16 [PATCH v4 0/6] RZN1 USB Host support Herve Codina
2022-04-28 15:16 ` [PATCH v4 1/6] dt-bindings: PCI: pci-rcar-gen2: Convert bindings to json-schema Herve Codina
2022-04-28 15:16 ` [PATCH v4 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032 Herve Codina
2022-04-29  8:33   ` Geert Uytterhoeven
2022-05-01  8:45   ` Krzysztof Kozlowski [this message]
2022-04-28 15:16 ` [PATCH v4 3/6] PCI: rcar-gen2: Add RZ/N1 SOCs family compatible string Herve Codina
2022-04-29  8:36   ` Geert Uytterhoeven
2022-04-28 15:16 ` [PATCH v4 4/6] ARM: dts: r9a06g032: Add internal PCI bridge node Herve Codina
2022-04-29  8:40   ` Geert Uytterhoeven
2022-04-28 15:16 ` [PATCH v4 5/6] ARM: dts: r9a06g032: Add USB PHY DT support Herve Codina
2022-04-29  8:40   ` Geert Uytterhoeven
2022-04-28 15:16 ` [PATCH v4 6/6] ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY Herve Codina

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