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Thu, 9 Jan 2025 07:41:12 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Thu, 09 Jan 2025 13:40:14 +0100 From: "Arnd Bergmann" To: WangYuli , "Greg Kroah-Hartman" , "Jiri Slaby" Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, "Andy Shevchenko" , "Arnd Bergmann" , "Niklas Schnelle" , pnewman@connecttech.com, "Sunil V L" , "Paul E. McKenney" , zhanjun@uniontech.com, guanwentao@uniontech.com, "Zhuozhen He" , "Guowei Chen" Message-Id: <11805e8c-c97b-4297-9c04-462fa1932ce1@app.fastmail.com> In-Reply-To: <41B1320691916DE6+20250109120808.559950-1-wangyuli@uniontech.com> References: <41B1320691916DE6+20250109120808.559950-1-wangyuli@uniontech.com> Subject: Re: [PATCH] serial: 8250_it8768e: Create iTE IT8768E specific 8250 driver Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Thu, Jan 9, 2025, at 13:08, WangYuli wrote: > [ General description per its product manual: ] > The IT8768E-I is a highly integrated Super I/O using the Low Pin > Count Interface. The device=E2=80=99s LPC interface complies with In= tel > "LPC Interface Specification Rev. 1.1=E2=80=9D. The IT8768E-I is ACP= I & > LANDesk compliant. > > Integrated in the IT8768E-I are five logical devices, which can > be individually enabled or disabled via software configuration > registers, and four 16C550standard compatible enhanced UARTs > perofrmacing asynchronous communication. The devices also provide > GPIO port controlling up to 12 GPIO pins. > > The IT8768E-I utilizes power-saving circuitry to reduce power > consumption, and once a logical device is disabled, the inputs > are inhibited with the clock disabled and the outputs are > tri-stated. The device requires a single 24/48 MHz clock input > and operates with +3.3V power supply. The IT8768E-I is available > in 48-pin LQFP. > > It has been determined that this chip is currently employed within > YIHUA STS-320 intelligent teller terminals utilizing > PCBA F21-2401 D2000 MB VerA LF motherboards. Can you explain why this isn't done as part of drivers/tty/serial/8250/8250_pnp.c? I see nothing unusual in here that requires a custom driver. Arnd