From: "Rangoju, Raju" <raju.rangoju@amd.com>
To: Vadim Fedorenko <vadim.fedorenko@linux.dev>,
andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, pabeni@redhat.com
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Shyam-sundar.S-k@amd.com
Subject: Re: [PATCH net-next v2 1/5] amd-xgbe: reorganize the code of XPCS access
Date: Fri, 9 May 2025 21:13:21 +0530 [thread overview]
Message-ID: <1196f552-493e-4b72-be72-a21309c07380@amd.com> (raw)
In-Reply-To: <c962b740-4cbc-4d1f-9dda-02820dc54daa@linux.dev>
On 5/1/2025 4:08 AM, Vadim Fedorenko wrote:
> On 28/04/2025 16:02, Raju Rangoju wrote:
>> The xgbe_{read/write}_mmd_regs_v* functions have common code which can
>> be moved to helper functions. Add new helper functions to calculate the
>> mmd_address for v1/v2 of xpcs access.
>>
>> Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
>> ---
>> Changes since v1:
>> - add the xgbe_ prefix to new functions
>>
>> drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 63 ++++++++++--------------
>> 1 file changed, 27 insertions(+), 36 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/
>> ethernet/amd/xgbe/xgbe-dev.c
>> index b51a3666dddb..765f20b24722 100644
>> --- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
>> +++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
>> @@ -1041,18 +1041,17 @@ static int xgbe_set_gpio(struct xgbe_prv_data
>> *pdata, unsigned int gpio)
>> return 0;
>> }
>> -static int xgbe_read_mmd_regs_v2(struct xgbe_prv_data *pdata, int prtad,
>> - int mmd_reg)
>> +static unsigned int xgbe_get_mmd_address(struct xgbe_prv_data *pdata,
>> int mmd_reg)
>> {
>> - unsigned long flags;
>> - unsigned int mmd_address, index, offset;
>> - int mmd_data;
>> -
>> - if (mmd_reg & XGBE_ADDR_C45)
>> - mmd_address = mmd_reg & ~XGBE_ADDR_C45;
>> - else
>> - mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff);
>> + return (mmd_reg & XGBE_ADDR_C45) ?
>> + mmd_reg & ~XGBE_ADDR_C45 :
>> + (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff);
>> +}
>> +static void xgbe_get_pcs_index_and_offset(struct xgbe_prv_data *pdata,
>> + unsigned int mmd_address,
>> + unsigned int *index, unsigned int *offset)
>> +{
>> /* The PCS registers are accessed using mmio. The underlying
>> * management interface uses indirect addressing to access the MMD
>> * register sets. This requires accessing of the PCS register in
>> two
>> @@ -1063,8 +1062,20 @@ static int xgbe_read_mmd_regs_v2(struct
>> xgbe_prv_data *pdata, int prtad,
>> * offset 1 bit and reading 16 bits of data.
>> */
>> mmd_address <<= 1;
>> - index = mmd_address & ~pdata->xpcs_window_mask;
>> - offset = pdata->xpcs_window + (mmd_address & pdata-
>> >xpcs_window_mask);
>> + *index = mmd_address & ~pdata->xpcs_window_mask;
>> + *offset = pdata->xpcs_window + (mmd_address & pdata-
>> >xpcs_window_mask);
>> +}
>> +
>> +static int xgbe_read_mmd_regs_v2(struct xgbe_prv_data *pdata, int prtad,
>> + int mmd_reg)
>> +{
>> + unsigned long flags;
>> + unsigned int mmd_address, index, offset;
>> + int mmd_data;
>
> Please, follow reverse Xmass tree ordering
Sure, will address it in v3. Thanks.
>
>> +
>> + mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);
>> +
>> + xgbe_get_pcs_index_and_offset(pdata, mmd_address, &index, &offset);
>> spin_lock_irqsave(&pdata->xpcs_lock, flags);
>> XPCS32_IOWRITE(pdata, pdata->xpcs_window_sel_reg, index);
>> @@ -1080,23 +1091,9 @@ static void xgbe_write_mmd_regs_v2(struct
>> xgbe_prv_data *pdata, int prtad,
>> unsigned long flags;
>> unsigned int mmd_address, index, offset;
>> - if (mmd_reg & XGBE_ADDR_C45)
>> - mmd_address = mmd_reg & ~XGBE_ADDR_C45;
>> - else
>> - mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff);
>> + mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);
>> - /* The PCS registers are accessed using mmio. The underlying
>> - * management interface uses indirect addressing to access the MMD
>> - * register sets. This requires accessing of the PCS register in two
>> - * phases, an address phase and a data phase.
>> - *
>> - * The mmio interface is based on 16-bit offsets and values. All
>> - * register offsets must therefore be adjusted by left shifting the
>> - * offset 1 bit and writing 16 bits of data.
>> - */
>> - mmd_address <<= 1;
>> - index = mmd_address & ~pdata->xpcs_window_mask;
>> - offset = pdata->xpcs_window + (mmd_address & pdata-
>> >xpcs_window_mask);
>> + xgbe_get_pcs_index_and_offset(pdata, mmd_address, &index, &offset);
>> spin_lock_irqsave(&pdata->xpcs_lock, flags);
>> XPCS32_IOWRITE(pdata, pdata->xpcs_window_sel_reg, index);
>> @@ -1111,10 +1108,7 @@ static int xgbe_read_mmd_regs_v1(struct
>> xgbe_prv_data *pdata, int prtad,
>> unsigned int mmd_address;
>> int mmd_data;
>> - if (mmd_reg & XGBE_ADDR_C45)
>> - mmd_address = mmd_reg & ~XGBE_ADDR_C45;
>> - else
>> - mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff);
>> + mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);
>> /* The PCS registers are accessed using mmio. The underlying APB3
>> * management interface uses indirect addressing to access the MMD
>> @@ -1139,10 +1133,7 @@ static void xgbe_write_mmd_regs_v1(struct
>> xgbe_prv_data *pdata, int prtad,
>> unsigned int mmd_address;
>> unsigned long flags;
>> - if (mmd_reg & XGBE_ADDR_C45)
>> - mmd_address = mmd_reg & ~XGBE_ADDR_C45;
>> - else
>> - mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff);
>> + mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);
>> /* The PCS registers are accessed using mmio. The underlying APB3
>> * management interface uses indirect addressing to access the MMD
>
next prev parent reply other threads:[~2025-05-09 15:43 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-28 15:02 [PATCH net-next v2 0/5] amd-xgbe: add support for AMD Crater Raju Rangoju
2025-04-28 15:02 ` [PATCH net-next v2 1/5] amd-xgbe: reorganize the code of XPCS access Raju Rangoju
2025-04-30 22:38 ` Vadim Fedorenko
2025-05-09 15:43 ` Rangoju, Raju [this message]
2025-04-28 15:02 ` [PATCH net-next v2 2/5] amd-xgbe: reorganize the xgbe_pci_probe() code path Raju Rangoju
2025-04-28 15:02 ` [PATCH net-next v2 3/5] amd-xgbe: add support for new XPCS routines Raju Rangoju
2025-04-29 19:37 ` Simon Horman
2025-05-09 15:41 ` Rangoju, Raju
2025-05-07 8:37 ` kernel test robot
2025-04-28 15:02 ` [PATCH net-next v2 4/5] amd-xgbe: Add XGBE_XPCS_ACCESS_V3 support to xgbe_pci_probe() Raju Rangoju
2025-04-28 15:02 ` [PATCH net-next v2 5/5] amd-xgbe: add support for new pci device id 0x1641 Raju Rangoju
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1196f552-493e-4b72-be72-a21309c07380@amd.com \
--to=raju.rangoju@amd.com \
--cc=Shyam-sundar.S-k@amd.com \
--cc=andrew+netdev@lunn.ch \
--cc=davem@davemloft.net \
--cc=edumazet@google.com \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=netdev@vger.kernel.org \
--cc=pabeni@redhat.com \
--cc=vadim.fedorenko@linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®