Re: [PATCH 1/2] drm/amd/display: use halving distribution for all encode-to-linear curves

[Alex Hung <alex.hung@amd.com>]

checkpatch reports the following error and warning. Are they intentional?

ERROR: Please use git commit description style 'commit <12+ chars of 
sha1> ("<title line>")' - ie: 'commit de17c6bb7072 ("drm/amd/display: 
use halving distribution for PQ/sRGB linearizing LUT")'
#13:
any encoded input, so remove the PQ/sRGB condition from de17c6bb7072 and

WARNING: Possible repeated word: 'segments'
#67: FILE: drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c:349:
+	/* 9 segments
+	* segments are from 2^-9 to 2^0

total: 1 errors, 1 warnings, 47 lines checked

On 8/19/26 10:00, Melissa Wen wrote:
> In encode-to-linear conversions, LUT entries should be uniformly
> distributed across the input range: non-linear encodings are already
> approximately perceptually uniform, so every input code carries the same
> weight. A fixed count per region does the opposite, concentrating
> entries on the darker values and leaving few for the bright end, whereas
> halving distribution spaces all 256 entries uniformly. This holds for
> any encoded input, so remove the PQ/sRGB condition from de17c6bb7072 and> apply halving to all encode-to-linear operations (pre-defined TF or user
> LUTs).
> 
> It fixes the following IGT kms_colorop subtests:
> - plane-XR30-XR30-srgb_inv_eotf_lut-srgb_eotf_lut
> - plane-XR30-XR30-gamma_2_2-gamma_2_2_inv-gamma_2_2
> 
> Fixes: de17c6bb7072 ("drm/amd/display: use halving distribution for PQ/sRGB linearizing LUT")
> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> Signed-off-by: Melissa Wen <mwen@igalia.com>
> ---
>   .../amd/display/dc/dcn30/dcn30_cm_common.c    | 34 ++++++-------------
>   1 file changed, 10 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c
> index 66fe7f313ea3..62ca235cd649 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c
> @@ -320,6 +320,8 @@ static struct fixed31_32 interp_tf_pts(const struct fixed31_32 *output_tf_channe
>   	return value;
>   }
>   
> +#define NUM_DEGAMMA_REGIONS    9
> +
>   bool cm3_helper_translate_curve_to_degamma_hw_format(
>   				const struct dc_transfer_func *output_tf,
>   				struct pwl_params *lut_params)
> @@ -343,31 +345,15 @@ bool cm3_helper_translate_curve_to_degamma_hw_format(
>   	memset(lut_params, 0, sizeof(struct pwl_params));
>   	memset(seg_distr, 0, sizeof(seg_distr));
>   
> -	if (output_tf->tf == TRANSFER_FUNCTION_PQ ||
> -	    output_tf->tf == TRANSFER_FUNCTION_SRGB) {
> -		/* 9 segments
> -		 * segments are from 2^-9 to 0
> -		 */
> -		const uint8_t SEG_COUNT = 9;
> -		seg_distr[0] = 0; // Since we only have one point in darkest region
> -		for (k = 1; k < SEG_COUNT; k++)
> -			seg_distr[k] = k - 1; // 2^(k-1) points per region; halves as k decreases
> +	/* 9 segments
> +	 * segments are from 2^-9 to 2^0
> +	 */
> +	seg_distr[0] = 0; // Since we only have one point in darkest region
> +	for (k = 1; k < NUM_DEGAMMA_REGIONS; k++)
> +		seg_distr[k] = k - 1; // 2^(k-1) points per region; halves as k decreases
>   
> -		region_start = -SEG_COUNT;
> -		region_end = 0;
> -	} else {
> -		/* 12 segments
> -		 * segments are from 2^-12 to 2^0
> -		 * There are less than 256 points, for optimization
> -		 */
> -		const uint8_t SEG_COUNT = 12;
> -
> -		for (i = 0; i < SEG_COUNT; i++)
> -			seg_distr[i] = 4;
> -
> -		region_start = -SEG_COUNT;
> -		region_end = 0;
> -	}
> +	region_start = -NUM_DEGAMMA_REGIONS;
> +	region_end = 0;
>   
>   	for (i = region_end - region_start; i < MAX_REGIONS_NUMBER ; i++)
>   		seg_distr[i] = -1;