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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=I4JVgtgg c=1 sm=1 tr=0 ts=6a268956 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=Wdb1h0LgAAAA:8 a=EUspDBNiAAAA:8 a=8ikbXZtZfkZUXiAuQb4A:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 a=j5gyrzqu0rbr1vhfHjzO:22 X-Proofpoint-ORIG-GUID: ynoJFk9fzBXxsTAIRB2S-dFu7yZwUfXs X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA4MDA4NiBTYWx0ZWRfXxibleeNmzOBZ X3ai80XmlHSGtr2zy0dPKgKs0qOUQYiLJ7OA6klIy9pyuMXIlEWjoGnQIM6+sLkKVNjbeDIuTd8 lBEfouZi5mNgMHiJrJoAdCi/Klr1B7SX1jDLV+n01I86ybvP0pn2GUbGN+wpI+ccp4pqiuyD4mq nTYptpfX6iD7OmNcE5JW3dOT2YyR1LotjkzJTclY7dkV9j7iEYH/ybruW0R8vPmsZsXK+Ci3mHV bIIYAh0zJwWIE4vYOKHmc43//fQdy8DsEn+fRjthnpAyQZmzkyucu/dczPTOhck5mLQscfPWuae EcybVYLn/n5ae4ZLQyZuviHB2VRESv9XPJTB5l92aiFJoRXASrojm6tf6DYh5eGcbWX2F0Y4qT+ yNvvWoSA1kkSvAkMXiU6ugtQzBkgL02DagzhgEXoSH42rVH5UtvFwpn4jL/cPyBMfyMAA80hF6o hHkiRMQrMIz82RHMaIw== X-Proofpoint-GUID: ynoJFk9fzBXxsTAIRB2S-dFu7yZwUfXs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-08_02,2026-06-05_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 bulkscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606080086 On 6/7/26 6:17 AM, Hongyang Zhao wrote: > The Qualcomm PCIe binding deprecates perst-gpios and wake-gpios > on the host bridge and expects board reset and wake GPIOs to be > described on the root port. PERST# is described there as > reset-gpios. > > Move the PCIe PHY references in kodiak.dtsi to the PCIe0 and PCIe1 > root port nodes, and move the board-specific PCIe reset and wake > GPIOs in the Kodiak DTs to the corresponding root ports. > > Keep the PHY and GPIO resources on the same root port nodes so the > Qualcomm PCIe driver can parse the root port binding instead of > falling back to the legacy host bridge GPIO parsing. > > Signed-off-by: Hongyang Zhao > --- Reviewed-by: Konrad Dybcio Konrad