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From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Scott Wood <oss@buserror.net>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v6 09/23] powerpc/8xx: CONFIG_PIN_TLB unneeded for CONFIG_PPC_EARLY_DEBUG_CPM
Date: Thu,  4 Feb 2016 11:33:19 +0100 (CET)	[thread overview]
Message-ID: <120cc246eac8a59e2f243e0d3ee46726d7cb1c9f.1454581227.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1454581226.git.christophe.leroy@c-s.fr>

IMMR is now mapped by page tables so it is not
anymore necessary to PIN TLBs

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
v2: no change
v3: no change
v4: no change
v5: no change
v6: no change

 arch/powerpc/Kconfig.debug | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 638f9ce..136b09c 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -220,7 +220,6 @@ config PPC_EARLY_DEBUG_40x
 config PPC_EARLY_DEBUG_CPM
 	bool "Early serial debugging for Freescale CPM-based serial ports"
 	depends on SERIAL_CPM
-	select PIN_TLB if PPC_8xx
 	help
 	  Select this to enable early debugging for Freescale chips
 	  using a CPM-based serial port.  This assumes that the bootwrapper
-- 
2.1.0

  parent reply	other threads:[~2016-02-04 10:51 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-04 10:33 [PATCH v6 00/23] powerpc/8xx: Use large pages for RAM and IMMR and other improvments Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 01/23] powerpc/8xx: Save r3 all the time in DTLB miss handler Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 02/23] powerpc/8xx: Map linear kernel RAM with 8M pages Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 03/23] powerpc: Update documentation for noltlbs kernel parameter Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 04/23] powerpc/8xx: move setup_initial_memory_limit() into 8xx_mmu.c Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 05/23] powerpc32: Fix pte_offset_kernel() to return NULL for bad pages Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 06/23] powerpc32: refactor x_mapped_by_bats() and x_mapped_by_tlbcam() together Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 07/23] powerpc/8xx: Fix vaddr for IMMR early remap Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 08/23] powerpc/8xx: Map IMMR area with 512k page at a fixed address Christophe Leroy
2016-02-04 10:33 ` Christophe Leroy [this message]
2016-02-04 10:33 ` [PATCH v6 10/23] powerpc/8xx: map more RAM at startup when needed Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 11/23] powerpc32: Remove useless/wrong MMU:setio progress message Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 12/23] powerpc32: remove ioremap_base Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 13/23] powerpc/8xx: Add missing SPRN defines into reg_8xx.h Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 14/23] powerpc/8xx: Handle CPU6 ERRATA directly in mtspr() macro Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 15/23] powerpc/8xx: remove special handling of CPU6 errata in set_dec() Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 16/23] powerpc/8xx: rewrite set_context() in C Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 17/23] powerpc/8xx: rewrite flush_instruction_cache() " Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 18/23] powerpc: add inline functions for cache related instructions Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 19/23] powerpc32: Remove clear_pages() and define clear_page() inline Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 20/23] powerpc32: move xxxxx_dcache_range() functions inline Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 21/23] powerpc: Simplify test in __dma_sync() Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 22/23] powerpc32: small optimisation in flush_icache_range() Christophe Leroy
2016-02-04 10:33 ` [PATCH v6 23/23] powerpc32: Remove one insn in mulhdu Christophe Leroy

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