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From:   Luca Weiss <luca@z3ntu.xyz>
To:     ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>
Cc:     linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org,
        Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Subject: Re: [PATCH 2/2] ARM: dts: qcom: msm8226: Add CPU and SAW/ACC nodes
Date:   Mon, 04 Dec 2023 19:38:37 +0100
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On Montag, 4. Dezember 2023 11:41:36 CET Konrad Dybcio wrote:
> On 3.12.2023 23:38, Luca Weiss wrote:
> > From: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
> > 
> > Add CPU and SAW/ACC nodes to enable SMP on MSM8226.
> > 
> > Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
> > [luca: update some nodes to fix dtbs_check errors, reorder, cleanup]
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
> 
> Looks like L2 SAW (@ 0xf9012000) is missing.. but then it's present
> on 8974.. but it's not bound by any driver :)

Right, I had this node before:

	saw_l2: power-controller@f9012000 {
		compatible = "qcom,saw2";
		reg = <0xf9012000 0x1000>;
		regulator;
	};

And then used like this:

	L2: l2-cache {
		compatible = "cache";
		cache-level = <2>;
		qcom,saw = <&saw_l2>;
	};

I decided to remove it because first there's no "qcom,saw2" (without a second 
compatible) in the yaml. And qcom,saw property in the l2-cache node also 
wasn't accepted. Since I'm not aware of any driver code currently using this 
(and the bindings not being particularly maintained, there's still this bit in 
.txt form?) I decided to remove it to not knowingly introduce binding errors.

Regards
Luca

> 
> The nodes you added here look correct FWIW
> 
> Konrad