From: Borislav Petkov <borislav.petkov@amd.com>
To: <norsk5@yahoo.com>
Cc: <linux-kernel@vger.kernel.org>, <x86@kernel.org>,
Borislav Petkov <borislav.petkov@amd.com>
Subject: [PATCH 10/10] amd64_edac: beef up DRAM error injection
Date: Thu, 24 Sep 2009 14:32:48 +0200 [thread overview]
Message-ID: <1253795568-9877-11-git-send-email-borislav.petkov@amd.com> (raw)
In-Reply-To: <1253795568-9877-1-git-send-email-borislav.petkov@amd.com>
When injecting DRAM ECC errors (F3xBC_x8), EccVector[15:0] is a bitmask
of which bits should be error injected when written to and holds the
payload of 16-bit DRAM word when read, respectively.
Add /sysfs members to show the DRAM ECC section/word/vector.
Fail wrong injection values entered over /sysfs instead of truncating
them.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
---
drivers/edac/amd64_edac.h | 6 +---
drivers/edac/amd64_edac_inj.c | 49 ++++++++++++++++++++++++++++++++++++-----
2 files changed, 45 insertions(+), 10 deletions(-)
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 6a22b1e..ba9dfbf 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -375,13 +375,11 @@ enum {
#define SET_NB_DRAM_INJECTION_WRITE(word, bits) \
(BIT(((word) & 0xF) + 20) | \
- BIT(17) | \
- ((bits) & 0xF))
+ BIT(17) | bits)
#define SET_NB_DRAM_INJECTION_READ(word, bits) \
(BIT(((word) & 0xF) + 20) | \
- BIT(16) | \
- ((bits) & 0xF))
+ BIT(16) | bits)
#define K8_NBCAP 0xE8
#define K8_NBCAP_CORES (BIT(12)|BIT(13))
diff --git a/drivers/edac/amd64_edac_inj.c b/drivers/edac/amd64_edac_inj.c
index d3675b7..29f1f7a 100644
--- a/drivers/edac/amd64_edac_inj.c
+++ b/drivers/edac/amd64_edac_inj.c
@@ -1,5 +1,11 @@
#include "amd64_edac.h"
+static ssize_t amd64_inject_section_show(struct mem_ctl_info *mci, char *buf)
+{
+ struct amd64_pvt *pvt = mci->pvt_info;
+ return sprintf(buf, "0x%x\n", pvt->injection.section);
+}
+
/*
* store error injection section value which refers to one of 4 16-byte sections
* within a 64-byte cacheline
@@ -15,12 +21,26 @@ static ssize_t amd64_inject_section_store(struct mem_ctl_info *mci,
ret = strict_strtoul(data, 10, &value);
if (ret != -EINVAL) {
+
+ if (value > 3) {
+ amd64_printk(KERN_WARNING,
+ "%s: invalid section 0x%lx\n",
+ __func__, value);
+ return -EINVAL;
+ }
+
pvt->injection.section = (u32) value;
return count;
}
return ret;
}
+static ssize_t amd64_inject_word_show(struct mem_ctl_info *mci, char *buf)
+{
+ struct amd64_pvt *pvt = mci->pvt_info;
+ return sprintf(buf, "0x%x\n", pvt->injection.word);
+}
+
/*
* store error injection word value which refers to one of 9 16-bit word of the
* 16-byte (128-bit + ECC bits) section
@@ -37,14 +57,25 @@ static ssize_t amd64_inject_word_store(struct mem_ctl_info *mci,
ret = strict_strtoul(data, 10, &value);
if (ret != -EINVAL) {
- value = (value <= 8) ? value : 0;
- pvt->injection.word = (u32) value;
+ if (value > 8) {
+ amd64_printk(KERN_WARNING,
+ "%s: invalid word 0x%lx\n",
+ __func__, value);
+ return -EINVAL;
+ }
+ pvt->injection.word = (u32) value;
return count;
}
return ret;
}
+static ssize_t amd64_inject_ecc_vector_show(struct mem_ctl_info *mci, char *buf)
+{
+ struct amd64_pvt *pvt = mci->pvt_info;
+ return sprintf(buf, "0x%x\n", pvt->injection.bit_map);
+}
+
/*
* store 16 bit error injection vector which enables injecting errors to the
* corresponding bit within the error injection word above. When used during a
@@ -60,8 +91,14 @@ static ssize_t amd64_inject_ecc_vector_store(struct mem_ctl_info *mci,
ret = strict_strtoul(data, 16, &value);
if (ret != -EINVAL) {
- pvt->injection.bit_map = (u32) value & 0xFFFF;
+ if (value & 0xFFFF0000) {
+ amd64_printk(KERN_WARNING,
+ "%s: invalid EccVector: 0x%lx\n",
+ __func__, value);
+ return -EINVAL;
+ }
+ pvt->injection.bit_map = (u32) value;
return count;
}
return ret;
@@ -147,7 +184,7 @@ struct mcidev_sysfs_attribute amd64_inj_attrs[] = {
.name = "inject_section",
.mode = (S_IRUGO | S_IWUSR)
},
- .show = NULL,
+ .show = amd64_inject_section_show,
.store = amd64_inject_section_store,
},
{
@@ -155,7 +192,7 @@ struct mcidev_sysfs_attribute amd64_inj_attrs[] = {
.name = "inject_word",
.mode = (S_IRUGO | S_IWUSR)
},
- .show = NULL,
+ .show = amd64_inject_word_show,
.store = amd64_inject_word_store,
},
{
@@ -163,7 +200,7 @@ struct mcidev_sysfs_attribute amd64_inj_attrs[] = {
.name = "inject_ecc_vector",
.mode = (S_IRUGO | S_IWUSR)
},
- .show = NULL,
+ .show = amd64_inject_ecc_vector_show,
.store = amd64_inject_ecc_vector_store,
},
{
--
1.6.3.3
prev parent reply other threads:[~2009-09-24 12:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-24 12:32 [PATCH 00/10] amd64_edac fixes Borislav Petkov
2009-09-24 12:32 ` [PATCH 01/10] amd64_edac: convert cpumask_t to struct cpumask ptr Borislav Petkov
2009-09-24 12:32 ` [PATCH 02/10] amd64_edac: unify MCGCTL ECC switching Borislav Petkov
2009-09-24 12:32 ` [PATCH 03/10] amd64_edac: fix driver instance lookup table allocation Borislav Petkov
2009-09-24 12:32 ` [PATCH 04/10] amd64_edac: fix DRAM base and limit address extraction Borislav Petkov
2009-09-24 12:32 ` [PATCH 05/10] amd64_edac: fix interleave enable tests Borislav Petkov
2009-09-24 12:32 ` [PATCH 06/10] amd64_edac: fix K8 intlv_sel check Borislav Petkov
2009-09-24 12:32 ` [PATCH 07/10] amd64_edac: simple fix to allow reporting of CECC errors Borislav Petkov
2009-09-24 12:32 ` [PATCH 08/10] amd64_edac: fix chip select handling Borislav Petkov
2009-09-24 12:32 ` [PATCH 09/10] amd64_edac: fix DRAM base and limit extraction Borislav Petkov
2009-09-24 12:32 ` Borislav Petkov [this message]
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