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From: Shawn Lin <shawn.lin@rock-chips.com>
To: "Sebastian Reichel" <sebastian.reichel@collabora.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Yury Norov (NVIDIA)" <yury.norov@gmail.com>,
	"Nicolas Frattaroli" <nicolas.frattaroli@collabora.com>
Cc: shawn.lin@rock-chips.com, Alexey Charkov <alchark@flipper.net>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	kernel@collabora.com
Subject: Re: [PATCH v6 08/10] PCI: dw-rockchip: Set broken L1SS resume flag
Date: Wed, 9 Sep 2026 09:11:27 +0800	[thread overview]
Message-ID: <1255b90b-1388-4ca4-a869-75db37100a2d@rock-chips.com> (raw)
In-Reply-To: <20260908-rockchip-pcie-system-suspend-v6-8-fbabcca9921b@collabora.com>

在 2026/09/08 星期二 22:51, Sebastian Reichel 写道:
> Setup the broken_l1ss_resume flag, so that pci_suspend_retains_context()
> returns false on the Rockchip platform allowing PCIe peripheral device
> drivers to act upon.
> 
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> ---
>   drivers/pci/controller/dwc/pcie-dw-rockchip.c | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index 17530507e41b..47d9cab909bc 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -458,6 +458,21 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp)
>   	return 0;
>   }
>   
> +static void rockchip_pcie_host_post_init(struct dw_pcie_rp *pp)
> +{
> +	/*
> +	 * During system suspend, the Rockchip RC driver effectively powers off
> +	 * the controller. If the link is in L1SS and the endpoint asserts
> +	 * CLKREQ# to exit L1SS, the time required to wake the system and
> +	 * restore the PHY/REFCLK may exceed the L1SS exit timing
> +	 * (L10_REFCLK_ON + T_COMMONMODE), resulting in Link Down (LDn) and a
> +	 * reset of the endpoint. Set this flag to indicate this limitation to
> +	 * client drivers so that they can avoid relying on device state being
> +	 * preserved during system suspend.
> +	 */

Yes, this is ture for Rockchip platforms that powering off the
controller as well as PHY is a default action during system suspend.

Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>

> +	pp->bridge->broken_l1ss_resume = true;
> +}
> +
>   static void rockchip_pcie_pme_turn_off(struct dw_pcie_rp *pp)
>   {
>   	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> @@ -497,6 +512,7 @@ static void rockchip_pcie_pme_turn_off(struct dw_pcie_rp *pp)
>   
>   static const struct dw_pcie_host_ops rockchip_pcie_host_ops = {
>   	.init = rockchip_pcie_host_init,
> +	.post_init = rockchip_pcie_host_post_init,
>   	.pme_turn_off = rockchip_pcie_pme_turn_off,
>   };
>   
> 


  reply	other threads:[~2026-09-09  1:26 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-08 14:51 [PATCH v6 00/10] PCI: dw-rockchip: add system suspend support Sebastian Reichel
2026-09-08 14:51 ` [PATCH v6 01/10] PCI: dw-rockchip: Fix LTSSM set functions Sebastian Reichel
2026-09-09  0:37   ` Shawn Lin
2026-09-08 14:51 ` [PATCH v6 02/10] PCI: dw-rockchip: Restore vpcie3v3 regulator handle Sebastian Reichel
2026-09-09  0:44   ` Shawn Lin
2026-10-13 17:29   ` Manivannan Sadhasivam
2026-09-08 14:51 ` [PATCH v6 03/10] PCI: dw-rockchip: Move devm_phy_get out of phy_init Sebastian Reichel
2026-09-09  0:54   ` Shawn Lin
2026-09-08 14:51 ` [PATCH v6 04/10] PCI: dw-rockchip: Add helper function for enhanced LTSSM control mode Sebastian Reichel
2026-09-09  0:56   ` Shawn Lin
2026-09-08 14:51 ` [PATCH v6 05/10] PCI: dw-rockchip: Add helper function for controller mode Sebastian Reichel
2026-09-09  0:58   ` Shawn Lin
2026-09-08 14:51 ` [PATCH v6 06/10] PCI: dw-rockchip: Add helper function for DDL indicator Sebastian Reichel
2026-09-09  0:58   ` Shawn Lin
2026-09-08 14:51 ` [PATCH v6 07/10] PCI: dw-rockchip: Add pme_turn_off support Sebastian Reichel
2026-09-09  1:07   ` Shawn Lin
2026-09-08 14:51 ` [PATCH v6 08/10] PCI: dw-rockchip: Set broken L1SS resume flag Sebastian Reichel
2026-09-09  1:11   ` Shawn Lin [this message]
2026-10-13 17:31   ` Manivannan Sadhasivam
2026-09-08 14:51 ` [PATCH v6 09/10] PCI: dw-rockchip: Add system PM support Sebastian Reichel
2026-10-13 18:48   ` Manivannan Sadhasivam
2026-10-15  3:56   ` Igor Velkov
2026-10-15  8:25   ` Philipp Zabel
2026-09-08 14:51 ` [PATCH v6 10/10] PCI: dw-rockchip: Clear debug buffer before entering L2 Sebastian Reichel
2026-09-09  1:14   ` Shawn Lin
2026-10-13 18:51   ` Manivannan Sadhasivam

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