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Tue, 15 Feb 2022 17:51:11 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 9635A22AFF2; Tue, 15 Feb 2022 17:51:11 +0100 (CET) Received: from [10.201.21.201] (10.75.127.51) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Tue, 15 Feb 2022 17:51:11 +0100 Message-ID: <12593c81-3ad5-ea48-178b-08ea99f376f6@foss.st.com> Date: Tue, 15 Feb 2022 17:51:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v2 6/7] ARM: dts: sti: move usb picophy nodes out of soc in stih410.dtsi Content-Language: en-US To: Alain Volmat , Rob Herring CC: Arnd Bergmann , , , References: <20220211181614.683497-1-avolmat@me.com> <20220211181614.683497-7-avolmat@me.com> From: Patrice CHOTARD In-Reply-To: <20220211181614.683497-7-avolmat@me.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-15_04,2022-02-14_04,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi ALain On 2/11/22 19:16, Alain Volmat wrote: > Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section. > Since they are controlled via syscfg, there is no reg property needed, > which is required when having the node within the soc section. > > Modification is done within stih410.dtsi and within related board > dts files (stih410-b2120.dts, stih410-b2260.dts). > > Signed-off-by: Alain Volmat > --- > v2: squash together 3 commits from v1 to avoid compilation issues > > arch/arm/boot/dts/stih410-b2120.dts | 16 +++++------ > arch/arm/boot/dts/stih410-b2260.dts | 16 +++++------ > arch/arm/boot/dts/stih410.dtsi | 42 ++++++++++++++--------------- > 3 files changed, 36 insertions(+), 38 deletions(-) > > diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts > index 9d3b118f5f0f..538ff98ca1b1 100644 > --- a/arch/arm/boot/dts/stih410-b2120.dts > +++ b/arch/arm/boot/dts/stih410-b2120.dts > @@ -24,6 +24,14 @@ aliases { > ethernet0 = ðernet0; > }; > > + usb2_picophy1: phy2 { > + status = "okay"; > + }; > + > + usb2_picophy2: phy3 { > + status = "okay"; > + }; > + > soc { > > mmc0: sdhci@9060000 { > @@ -33,14 +41,6 @@ mmc0: sdhci@9060000 { > sd-uhs-ddr50; > }; > > - usb2_picophy1: phy2@0 { > - status = "okay"; > - }; > - > - usb2_picophy2: phy3@0 { > - status = "okay"; > - }; > - > ohci0: usb@9a03c00 { > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/stih410-b2260.dts b/arch/arm/boot/dts/stih410-b2260.dts > index c2d3b6de55d0..26d93f26f6d0 100644 > --- a/arch/arm/boot/dts/stih410-b2260.dts > +++ b/arch/arm/boot/dts/stih410-b2260.dts > @@ -82,6 +82,14 @@ phy_port1: port@9b2a000 { > }; > }; > > + usb2_picophy1: phy2 { > + status = "okay"; > + }; > + > + usb2_picophy2: phy3 { > + status = "okay"; > + }; > + > soc { > /* Low speed expansion connector */ > uart0: serial@9830000 { > @@ -152,14 +160,6 @@ pwm1: pwm@9510000 { > status = "okay"; > }; > > - usb2_picophy1: phy2@0 { > - status = "okay"; > - }; > - > - usb2_picophy2: phy3@0 { > - status = "okay"; > - }; > - > ohci0: usb@9a03c00 { > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi > index fe83d9a522bf..ce2f62cf129b 100644 > --- a/arch/arm/boot/dts/stih410.dtsi > +++ b/arch/arm/boot/dts/stih410.dtsi > @@ -12,31 +12,29 @@ aliases { > bdisp0 = &bdisp0; > }; > > - soc { > - usb2_picophy1: phy2@0 { > - compatible = "st,stih407-usb2-phy"; > - reg = <0 0>; > - #phy-cells = <0>; > - st,syscfg = <&syscfg_core 0xf8 0xf4>; > - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, > - <&picophyreset STIH407_PICOPHY0_RESET>; > - reset-names = "global", "port"; > + usb2_picophy1: phy2 { > + compatible = "st,stih407-usb2-phy"; > + #phy-cells = <0>; > + st,syscfg = <&syscfg_core 0xf8 0xf4>; > + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, > + <&picophyreset STIH407_PICOPHY0_RESET>; > + reset-names = "global", "port"; > + > + status = "disabled"; > + }; > > - status = "disabled"; > - }; > + usb2_picophy2: phy3 { > + compatible = "st,stih407-usb2-phy"; > + #phy-cells = <0>; > + st,syscfg = <&syscfg_core 0xfc 0xf4>; > + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, > + <&picophyreset STIH407_PICOPHY1_RESET>; > + reset-names = "global", "port"; > > - usb2_picophy2: phy3@0 { > - compatible = "st,stih407-usb2-phy"; > - reg = <0 0>; > - #phy-cells = <0>; > - st,syscfg = <&syscfg_core 0xfc 0xf4>; > - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, > - <&picophyreset STIH407_PICOPHY1_RESET>; > - reset-names = "global", "port"; > - > - status = "disabled"; > - }; > + status = "disabled"; > + }; > > + soc { > ohci0: usb@9a03c00 { > compatible = "st,st-ohci-300x"; > reg = <0x9a03c00 0x100>; Reviewed-by: Patrice Chotard Thanks Patrice