[PATCH 0/7] amd iommu smart tlb flushing

[Joerg Roedel <joerg.roedel@amd.com>]

Hi,

this patchset implements a smarter io-tlb flushing strategy for the AMD IOMMU
driver. The old behavior was to flush only a single 4kb entry or the whole
domain io-tlb. This patchset implements book keeping about the ranges of PTEs
changed in the page table and flushes only that ranges when the flush is
actually done.

	Joerg

Joerg Roedel (7):
      x86/amd-iommu: Add flush_info to protection domains
      x86/amd-iommu: Introduce iommu_update_domain_tlb function
      x86/amd-iommu: Move dte udpate flag into flush_info structure
      x86/amd-iommu: Move functions to get rid of forward declarations
      x86/amd-iommu: Add function to commit domain changes
      x86/amd-iommu: Introduce iommu_update_dma_ops_domain()
      x86/amd-iommu: Reimplement iommu_flush_tlb_pde using iommu_update_domain_tlb

 arch/x86/include/asm/amd_iommu_types.h |   13 ++-
 arch/x86/kernel/amd_iommu.c            |  225 ++++++++++++++++----------------
 2 files changed, 124 insertions(+), 114 deletions(-)