From: Huang Ying <ying.huang@intel.com>
To: Ingo Molnar <mingo@elte.hu>, "H. Peter Anvin" <hpa@zytor.com>
Cc: linux-kernel@vger.kernel.org, Andi Kleen <andi@firstfloor.org>,
Huang Ying <ying.huang@intel.com>
Subject: [RFC 2/3] Use unified NMI delayed call mechanism in MCE handler
Date: Sat, 12 Jun 2010 17:28:15 +0800 [thread overview]
Message-ID: <1276334896-7075-2-git-send-email-ying.huang@intel.com> (raw)
In-Reply-To: <1276334896-7075-1-git-send-email-ying.huang@intel.com>
The original self interrupt mechanism in MCE handler is replaced by
the unified delayed call mechanism.
Signed-off-by: Huang Ying <ying.huang@intel.com>
---
arch/x86/include/asm/entry_arch.h | 4 --
arch/x86/include/asm/irq_vectors.h | 5 ---
arch/x86/kernel/cpu/mcheck/mce.c | 53 ++++++-------------------------------
arch/x86/kernel/entry_64.S | 5 ---
arch/x86/kernel/irqinit.c | 3 --
5 files changed, 10 insertions(+), 60 deletions(-)
--- a/arch/x86/include/asm/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -61,9 +61,5 @@ BUILD_INTERRUPT(thermal_interrupt,THERMA
BUILD_INTERRUPT(threshold_interrupt,THRESHOLD_APIC_VECTOR)
#endif
-#ifdef CONFIG_X86_MCE
-BUILD_INTERRUPT(mce_self_interrupt,MCE_SELF_VECTOR)
-#endif
-
BUILD_INTERRUPT(nmi_delayed_call_interrupt,NMI_DELAYED_CALL_VECTOR)
#endif
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -121,11 +121,6 @@
#define UV_BAU_MESSAGE 0xea
/*
- * Self IPI vector for machine checks
- */
-#define MCE_SELF_VECTOR 0xeb
-
-/*
* Self IPI vector for NMI delayed call
*/
#define NMI_DELAYED_CALL_VECTOR 0xe9
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -480,60 +480,22 @@ static inline void mce_get_rip(struct mc
m->ip = mce_rdmsrl(rip_msr);
}
-#ifdef CONFIG_X86_LOCAL_APIC
-/*
- * Called after interrupts have been reenabled again
- * when a MCE happened during an interrupts off region
- * in the kernel.
- */
-asmlinkage void smp_mce_self_interrupt(struct pt_regs *regs)
+static int mce_delayed_call_id = NMI_DELAYED_CALL_ID_INVALID;
+
+static void __mce_report_event(void)
{
- ack_APIC_irq();
- exit_idle();
- irq_enter();
mce_notify_irq();
mce_schedule_work();
- irq_exit();
}
-#endif
static void mce_report_event(struct pt_regs *regs)
{
if (regs->flags & (X86_VM_MASK|X86_EFLAGS_IF)) {
- mce_notify_irq();
- /*
- * Triggering the work queue here is just an insurance
- * policy in case the syscall exit notify handler
- * doesn't run soon enough or ends up running on the
- * wrong CPU (can happen when audit sleeps)
- */
- mce_schedule_work();
+ __mce_report_event();
return;
}
-#ifdef CONFIG_X86_LOCAL_APIC
- /*
- * Without APIC do not notify. The event will be picked
- * up eventually.
- */
- if (!cpu_has_apic)
- return;
-
- /*
- * When interrupts are disabled we cannot use
- * kernel services safely. Trigger an self interrupt
- * through the APIC to instead do the notification
- * after interrupts are reenabled again.
- */
- apic->send_IPI_self(MCE_SELF_VECTOR);
-
- /*
- * Wait for idle afterwards again so that we don't leave the
- * APIC in a non idle state because the normal APIC writes
- * cannot exclude us.
- */
- apic_wait_icr_idle();
-#endif
+ nmi_delayed_call_schedule(mce_delayed_call_id);
}
DEFINE_PER_CPU(unsigned, mce_poll_count);
@@ -1731,6 +1693,11 @@ __setup("mce", mcheck_enable);
int __init mcheck_init(void)
{
+ mce_delayed_call_id = nmi_delayed_call_register(__mce_report_event);
+ if (mce_delayed_call_id == NMI_DELAYED_CALL_ID_INVALID)
+ pr_err(
+ "Failed to register mce delayed event reporting function!\n");
+
atomic_notifier_chain_register(&x86_mce_decoder_chain, &mce_dec_nb);
mcheck_intel_therm_init();
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -1004,11 +1004,6 @@ apicinterrupt THRESHOLD_APIC_VECTOR \
apicinterrupt THERMAL_APIC_VECTOR \
thermal_interrupt smp_thermal_interrupt
-#ifdef CONFIG_X86_MCE
-apicinterrupt MCE_SELF_VECTOR \
- mce_self_interrupt smp_mce_self_interrupt
-#endif
-
apicinterrupt NMI_DELAYED_CALL_VECTOR \
nmi_delayed_call_interrupt smp_nmi_delayed_call_interrupt
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -209,9 +209,6 @@ static void __init apic_intr_init(void)
#ifdef CONFIG_X86_MCE_THRESHOLD
alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
#endif
-#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_LOCAL_APIC)
- alloc_intr_gate(MCE_SELF_VECTOR, mce_self_interrupt);
-#endif
#if defined(CONFIG_X86_LOCAL_APIC)
alloc_intr_gate(NMI_DELAYED_CALL_VECTOR, nmi_delayed_call_interrupt);
#endif
next prev parent reply other threads:[~2010-06-12 9:28 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-12 9:28 [RFC 1/3] Unified NMI delayed call mechanism Huang Ying
2010-06-12 9:28 ` Huang Ying [this message]
2010-06-12 9:28 ` [RFC 3/3] Use unified NMI delayed call mechanism in perf event NMI handler Huang Ying
2010-06-12 10:25 ` [RFC 1/3] Unified NMI delayed call mechanism Ingo Molnar
2010-06-13 1:54 ` Huang Ying
2010-06-14 3:45 ` Hidetoshi Seto
2010-06-14 13:54 ` Don Zickus
2010-06-14 14:44 ` Andi Kleen
2010-06-14 15:12 ` Don Zickus
2010-06-18 10:30 ` Ingo Molnar
2010-06-18 9:48 ` Ingo Molnar
2010-06-18 11:34 ` huang ying
2010-06-18 12:45 ` Ingo Molnar
2010-06-18 13:40 ` huang ying
2010-06-18 14:35 ` Ingo Molnar
2010-06-18 15:16 ` huang ying
2010-06-18 15:31 ` Peter Zijlstra
2010-06-19 1:51 ` huang ying
2010-06-19 8:02 ` Andi Kleen
2010-06-19 10:53 ` Ingo Molnar
2010-06-19 14:07 ` huang ying
2010-06-19 14:24 ` Andi Kleen
2010-06-18 11:55 ` Peter Zijlstra
2010-06-18 12:25 ` Andi Kleen
2010-06-18 12:48 ` Peter Zijlstra
2010-06-18 13:09 ` Andi Kleen
2010-06-18 13:12 ` Peter Zijlstra
2010-06-18 13:23 ` Andi Kleen
2010-06-18 13:24 ` Peter Zijlstra
2010-06-18 14:37 ` Ingo Molnar
2010-06-19 14:17 ` Andi Kleen
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