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Peter Anvin" To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org CC: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, andrew.cooper3@citrix.com Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_v1_1/1=5D_x86/fred=3A_Fix_the_FRED_?= =?US-ASCII?Q?RSP0_MSR_out_of_sync_with_its_per_CPU_cache?= User-Agent: K-9 Mail for Android In-Reply-To: <20250108023641.17396-1-xin@zytor.com> References: <20250108023641.17396-1-xin@zytor.com> Message-ID: <1282A5DA-1D5F-49F6-B780-FC8520C20266@zytor.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On January 7, 2025 6:36:41 PM PST, "Xin Li (Intel)" wrote= : >The FRED RSP0 MSR (pointing to the top of the kernel stack for user >level event delivery) and its per CPU cache should be kept in sync to >avoid redundant writes in the exit to user space path, as a result, >a write to the FRED RSP0 MSR is paired with a write to its per CPU >cache as fred_update_rsp0() does=2E > >However as the FRED RSP0 MSR is set to 0 in cpu_init_fred_exceptions(), >it gets out of sync with its per CPU cache during a CPU offline/online >cycle, which causes #DF exceptions if no context switch happens after >a CPU offline/online cycle and before exit to user space=2E > >Fix the bug through resynchronizing the FRED RSP0 MSR with its per CPU >cache value in cpu_init_fred_exceptions()=2E > >Fixes: fe85ee391966 ("x86/entry: Set FRED RSP0 on return to userspace ins= tead of context switch") >Signed-off-by: Xin Li (Intel) >Cc: stable@vger=2Ekernel=2Eorg >--- > arch/x86/kernel/fred=2Ec | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > >diff --git a/arch/x86/kernel/fred=2Ec b/arch/x86/kernel/fred=2Ec >index 8d32c3f48abc=2E=2E9524ace96bfa 100644 >--- a/arch/x86/kernel/fred=2Ec >+++ b/arch/x86/kernel/fred=2Ec >@@ -50,7 +50,18 @@ void cpu_init_fred_exceptions(void) > FRED_CONFIG_ENTRYPOINT(asm_fred_entrypoint_user)); >=20 > wrmsrl(MSR_IA32_FRED_STKLVLS, 0); >- wrmsrl(MSR_IA32_FRED_RSP0, 0); >+ >+ /* >+ * Resynchronize the FRED RSP0 MSR with its per CPU cache value=2E >+ * >+ * Another option is to leave the FRED RSP0 MSR as-is, because the RESE= T >+ * state of FRED MSRs is zero and INIT does not change the value of the >+ * FRED MSRs in a CPU offline/online cycle=2E But it doesn't seem safe= to >+ * depend on the properties of INIT as that's way too many things that >+ * could cause bugs=2E >+ */ >+ wrmsrl(MSR_IA32_FRED_RSP0, __this_cpu_read(fred_rsp0)); >+ > wrmsrl(MSR_IA32_FRED_RSP1, 0); > wrmsrl(MSR_IA32_FRED_RSP2, 0); > wrmsrl(MSR_IA32_FRED_RSP3, 0); > >base-commit: cf6b067860f69fe01b08ebae9138fe0f89854398 Looks straightforward enough=2E Reviewed-by: H=2E Peter Anvin (Intel)