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Subject: Re: [tip:x86/mm] percpu: Introduce a read-mostly percpu API
From: Eric Dumazet <eric.dumazet@gmail.com>
To: "H. Peter Anvin" <hpa@zytor.com>
Cc: Shaohua Li <shaohua.li@intel.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "hpa@linux.intel.com" <hpa@linux.intel.com>
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Date: Thu, 21 Oct 2010 08:07:57 +0200
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Le mercredi 20 octobre 2010 à 22:54 -0700, H. Peter Anvin a écrit :

> L1_CACHE_BYTES is completely pointless, since if there is sharing to
> worry about *at all*, it's probably at the L2 or L3 cache levels.
> 

I see, and we dont have better way to express this hint/requirement than
using PAGE_SIZE or INTERNODE_CACHE_SHIFT ?

In your patch you force a PAGE_SIZE alignement *before*
*(.data..percpu..page_aligned)   

If this alignment is really needed, this should be part of another
patch, since this fixes a previous bug in 2.6.36 ?