From: Borislav Petkov <bp@amd64.org>
To: <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>,
Borislav Petkov <borislav.petkov@amd.com>
Subject: [PATCH 25/30] amd64_edac: Sanitize ->read_dram_ctl_register
Date: Thu, 10 Feb 2011 18:15:28 +0100 [thread overview]
Message-ID: <1297358133-14320-26-git-send-email-bp@amd64.org> (raw)
In-Reply-To: <1297358133-14320-1-git-send-email-bp@amd64.org>
From: Borislav Petkov <borislav.petkov@amd.com>
This function is relevant for F10h and higher, and it has only one
callsite so drop its function pointer from the low_ops struct.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
---
drivers/edac/amd64_edac.c | 14 +++++++-------
drivers/edac/amd64_edac.h | 2 --
2 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 1cd82f9..b85487d 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1138,16 +1138,18 @@ static int f10_dbam_to_chip_select(struct amd64_pvt *pvt, int cs_mode)
return dbam_map[cs_mode];
}
-static void f10_read_dram_ctl_register(struct amd64_pvt *pvt)
+static void read_dram_ctl_register(struct amd64_pvt *pvt)
{
+ if (boot_cpu_data.x86 == 0xf)
+ return;
+
if (!amd64_read_dct_pci_cfg(pvt, DCT_SEL_LO, &pvt->dct_sel_lo)) {
debugf0("F2x110 (DCTSelLow): 0x%08x, High range addrs at: 0x%x\n",
pvt->dct_sel_lo, dct_sel_baseaddr(pvt));
- debugf0(" mode: %s, All DCTs on: %s\n",
- (dct_ganging_enabled(pvt) ? "ganged" : "unganged"),
- (dct_dram_enabled(pvt) ? "yes" : "no"));
+ debugf0(" DCTs operate in %s mode.\n",
+ (dct_ganging_enabled(pvt) ? "ganged" : "unganged"));
if (!dct_ganging_enabled(pvt))
debugf0(" Address range split per DCT: %s\n",
@@ -1579,7 +1581,6 @@ static struct amd64_family_type amd64_family_types[] = {
.f3_id = PCI_DEVICE_ID_AMD_10H_NB_MISC,
.ops = {
.early_channel_count = f1x_early_channel_count,
- .read_dram_ctl_register = f10_read_dram_ctl_register,
.map_sysaddr_to_csrow = f1x_map_sysaddr_to_csrow,
.dbam_to_cs = f10_dbam_to_chip_select,
.read_dct_pci_cfg = f10_read_dct_pci_cfg,
@@ -1939,8 +1940,7 @@ static void read_mc_regs(struct amd64_pvt *pvt)
amd64_read_pci_cfg(pvt->F3, NBCAP, &pvt->nbcap);
- if (pvt->ops->read_dram_ctl_register)
- pvt->ops->read_dram_ctl_register(pvt);
+ read_dram_ctl_register(pvt);
for (range = 0; range < DRAM_RANGES; range++) {
u8 rw;
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 3c60b2f..e14a8d0 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -236,7 +236,6 @@
#define dct_ganging_enabled(pvt) ((boot_cpu_data.x86 == 0x10) && ((pvt)->dct_sel_lo & BIT(4)))
#define dct_data_intlv_enabled(pvt) ((pvt)->dct_sel_lo & BIT(5))
-#define dct_dram_enabled(pvt) ((pvt)->dct_sel_lo & BIT(8))
#define dct_memory_cleared(pvt) ((pvt)->dct_sel_lo & BIT(10))
#define SWAP_INTLV_REG 0x10c
@@ -444,7 +443,6 @@ extern struct mcidev_sysfs_attribute amd64_dbg_attrs[NUM_DBG_ATTRS],
*/
struct low_ops {
int (*early_channel_count) (struct amd64_pvt *pvt);
- void (*read_dram_ctl_register) (struct amd64_pvt *pvt);
void (*map_sysaddr_to_csrow) (struct mem_ctl_info *mci, u64 sys_addr,
u16 syndrome);
int (*dbam_to_cs) (struct amd64_pvt *pvt, int cs_mode);
--
1.7.4.rc2
next prev parent reply other threads:[~2011-02-10 17:16 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-10 17:15 [PATCH 00/30] amd64_edac: Add Bulldozer support Borislav Petkov
2011-02-10 17:15 ` [PATCH 01/30] EDAC: Shut up sysfs registration debug code Borislav Petkov
2011-02-10 17:15 ` [PATCH 02/30] amd64_edac: Add support for F15h DCT PCI config accesses Borislav Petkov
2011-02-10 17:15 ` [PATCH 03/30] amd64_edac: Remove DRAM base/limit subfields caching Borislav Petkov
2011-02-10 17:15 ` [PATCH 04/30] amd64_edac: Cleanup DHAR handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 05/30] amd64_edac: Cleanup chipselect handling Borislav Petkov
2011-03-29 14:56 ` Mauro Carvalho Chehab
2011-03-29 15:16 ` Borislav Petkov
2011-03-29 15:39 ` Mauro Carvalho Chehab
2011-03-29 16:02 ` Borislav Petkov
2011-03-29 17:32 ` Mauro Carvalho Chehab
2011-02-10 17:15 ` [PATCH 06/30] amd64_edac: Sanitize channel extraction Borislav Petkov
2011-02-10 17:15 ` [PATCH 07/30] amd64_edac: Sanitize f10_get_base_addr_offset Borislav Petkov
2011-02-10 17:15 ` [PATCH 08/30] amd64_edac: Replace huge bitmasks with a macro Borislav Petkov
2011-02-10 17:15 ` [PATCH 09/30] amd64_edac: Cleanup DBAM handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 10/30] amd64_edac: Cleanup Dram Configuration registers handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 11/30] amd64_edac: Cleanup DCT Select Low/High code Borislav Petkov
2011-02-10 17:15 ` [PATCH 12/30] amd64_edac: Cleanup NBCTL code Borislav Petkov
2011-02-10 17:15 ` [PATCH 13/30] amd64_edac: Cleanup NBCFG handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 14/30] amd64_edac: Cleanup NBSH cruft Borislav Petkov
2011-02-10 17:15 ` [PATCH 15/30] amd64_edac: Cleanup old defines cruft Borislav Petkov
2011-02-10 17:15 ` [PATCH 16/30] amd64_edac: Adjust channel counting to F15h Borislav Petkov
2011-02-10 17:15 ` [PATCH 17/30] amd64_edac: Simplify decoding path Borislav Petkov
2011-02-10 17:15 ` [PATCH 18/30] amd64_edac: Unify get_error_address Borislav Petkov
2011-02-10 17:15 ` [PATCH 19/30] amd64_edac: Add support for interleaved region swapping Borislav Petkov
2011-02-10 17:15 ` [PATCH 20/30] amd64_edac: Correct node interleaving removal Borislav Petkov
2011-02-10 17:15 ` [PATCH 21/30] amd64_edac: Fix channel interleave removal Borislav Petkov
2011-02-10 17:15 ` [PATCH 22/30] amd64_edac: Revamp online spare handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 23/30] amd64_edac: Beef up early exit reporting Borislav Petkov
2011-02-10 17:15 ` [PATCH 24/30] amd64_edac: Adjust sys_addr to chip select conversion routine to F15h Borislav Petkov
2011-02-10 17:15 ` Borislav Petkov [this message]
2011-02-10 17:15 ` [PATCH 26/30] amd64_edac: Improve DRAM address mapping Borislav Petkov
2011-02-10 17:15 ` [PATCH 27/30] PCI: Rename CPU PCI id define Borislav Petkov
2011-02-10 17:15 ` [PATCH 28/30] amd64_edac: Simplify scrubrate setting Borislav Petkov
2011-02-10 17:15 ` [PATCH 29/30] amd64_edac: Adjust ECC symbol size to F15h Borislav Petkov
2011-02-10 17:15 ` [PATCH 30/30] amd64_edac: Enable driver on F15h Borislav Petkov
2011-02-10 18:56 ` [PATCH 00/30] amd64_edac: Add Bulldozer support Greg KH
2011-02-10 19:20 ` Borislav Petkov
2011-02-10 19:22 ` Jesse Barnes
2011-02-10 21:43 ` Borislav Petkov
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