From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C8FA82C08B1; Fri, 19 Dec 2025 12:11:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766146298; cv=none; b=Pgoc4WI9+DM2+keia6ywypT6263I+vnSpY9smc/UQf6L4kiwd8wroVVybiAsYdR3Nbtrp6oPLLN/ddB4PZvhzn4qQn4e8AUBO13/0sp0ok5Mss3zj9QsbHdu8VBOecSrWxa5y6a2Dox5iUg7/1Gg+Y3G4JiqMOsfMNoNuQP3+b8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766146298; c=relaxed/simple; bh=bDcqQG83RN8b6h4lbODTAb3alpf98NZ6TPwo9QOmpws=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=GtxJBMR9uwm35V392MwY+LaI6fBHjzTkIswFpG160J44fDIh9MLxJbpoMjdrDs+z7EdOhzVSvv9kLmQosCrLiZ7EEioNAOgqPVpAx1Q8R7jYCZNrnGLdAy45F1SPB13KsmDwZGsYhWJD9nuyC7Ii/FK0pVMB25QVrHktDrqkOVk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EC856FEC; Fri, 19 Dec 2025 04:11:28 -0800 (PST) Received: from [10.1.197.1] (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DB0203F5CA; Fri, 19 Dec 2025 04:11:33 -0800 (PST) Message-ID: <13141782-ba6e-4753-9613-2b128e008d56@arm.com> Date: Fri, 19 Dec 2025 12:11:32 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/2] dt-bindings: arm: add CTCU device for monaco To: Jie Gan , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang , Yuanfang Zhang , Mao Jinlong , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski References: <20251103-enable-ctcu-for-monaco-v4-0-92ff83201584@oss.qualcomm.com> <20251103-enable-ctcu-for-monaco-v4-1-92ff83201584@oss.qualcomm.com> Content-Language: en-US From: Suzuki K Poulose In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 19/12/2025 09:08, Jie Gan wrote: > > > On 11/3/2025 3:06 PM, Jie Gan wrote: >> The CTCU device for monaco shares the same configurations as SA8775p. Add >> a fallback to enable the CTCU for monaco to utilize the compitable of the >> SA8775p. >> > > Gentle reminder. I was under the assumption that this was going via msm tree ? Sorry, I misunderstood. I can pull this in for v6.20 Suzuki > >> Reviewed-by: Krzysztof Kozlowski >> Acked-by: Suzuki K Poulose >> Reviewed-by: Bjorn Andersson >> Signed-off-by: Jie Gan >> --- >>   Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml | 9 + >> ++++++-- >>   1 file changed, 7 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight- >> ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight- >> ctcu.yaml >> index c969c16c21ef..460f38ddbd73 100644 >> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml >> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml >> @@ -26,8 +26,13 @@ description: | >>   properties: >>     compatible: >> -    enum: >> -      - qcom,sa8775p-ctcu >> +    oneOf: >> +      - items: >> +          - enum: >> +              - qcom,qcs8300-ctcu >> +          - const: qcom,sa8775p-ctcu >> +      - enum: >> +          - qcom,sa8775p-ctcu >>     reg: >>       maxItems: 1 >> >