From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752938Ab1ITGXn (ORCPT ); Tue, 20 Sep 2011 02:23:43 -0400 Received: from mga09.intel.com ([134.134.136.24]:56163 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752368Ab1ITGXm (ORCPT ); Tue, 20 Sep 2011 02:23:42 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.67,351,1309762800"; d="scan'208";a="50477113" Subject: Re: [PATCH 16/18] dmaengine/ambhe rest oa-pl08x: Add support for sg len greater than one for slave transfers From: Vinod Koul To: Linus Walleij Cc: Viresh Kumar , Pratyush ANAND , Rajeev KUMAR , "linux@arm.linux.org.uk" , Bhupesh SHARMA , Armando VISCONTI , "linux-kernel@vger.kernel.org" , Vipin KUMAR , Shiraz HASHIM , Amit VIRDI , Vipul Kumar SAMAR , "viresh.linux@gmail.com" , Deepak SIKRI , "Williams, Dan J" , "linux-arm-kernel@lists.infradead.org" In-Reply-To: <1315518873.6638.7.camel@vkoul-mobl4> References: <5d691ab0c4f447c9f324213d8d740ac61d1739a1.1311936524.git.viresh.kumar@st.com> <20110814083618.GE4986@n2100.arm.linux.org.uk> <4E4CCF7B.8060704@st.com> <20110821083306.GA12028@n2100.arm.linux.org.uk> <4E532B19.6000103@st.com> <4E5715CE.2070806@st.com> <4E575E75.40603@st.com> <4E5F594D.10203@st.com> <438BB0150E931F4B9CE701519A4463010871804A4C@bgsmsx502.gar.corp.intel.com> <4E683B74.5000701@st.com> <1315518873.6638.7.camel@vkoul-mobl4> Content-Type: text/plain; charset="UTF-8" Date: Tue, 20 Sep 2011 11:49:34 +0530 Message-ID: <1316499574.31295.3.camel@vkoul-udesk3> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2011-09-09 at 03:24 +0530, Vinod Koul wrote: > On Thu, 2011-09-08 at 12:29 +0200, Linus Walleij wrote: > > On Thu, Sep 8, 2011 at 5:50 AM, Viresh Kumar wrote: > > > > > If i am getting this clearly, the concern is "why to queue separate transfers for > > > individual sg's? Better would be to prepare the complete list at once and > > > start the transfer, so that DMA stops only after finishing all sg's > > > passed from user." Is this what you are pointing at? > > > > Yes. > > > > > If yes, then the same is done in this patch too. An array for llis is allocated at > > > the start, then for each sg i prepare lli list from this array. Last lli from one sg > > > is followed by first lli from next sg. And so i get a continuous chain of llis. > > > > OK so I guess I was lost in the code ... > > > > So this is mainy cached as txd->dsg_list so you can quickly retrieve the > > number of bytes pending in the LLI by traversing that sglist. > > > > This is better than what the coh901318 does, because that driver > > resorts to going into the physical LLIs themselves to retrieve this > > info. > > > > It also seems like this will play nice with Per Forlin's MMC > > speed-up patches, so that will become effective for your MMC > > usecases. > > > > Now I really like this patch. > > > > Sorry for being such a slow learner! > > Reviewed-by: Linus Walleij > Okay, great. I will check the rest of the series (i think 3 patches) and > apply then next week. Applied the remaining two patches for the series to my next -- ~Vinod