From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758115Ab1JFGvo (ORCPT ); Thu, 6 Oct 2011 02:51:44 -0400 Received: from sm-d311v.smileserver.ne.jp ([203.211.202.206]:27162 "EHLO sm-d311v.smileserver.ne.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750934Ab1JFGvm (ORCPT ); Thu, 6 Oct 2011 02:51:42 -0400 From: Tomoya MORINAGA To: Jean Delvare , Ben Dooks , Wolfram Sang , Qi Wang , Linus Walleij , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: yong.y.wang@intel.com, joel.clark@intel.com, kok.howg.ewe@intel.com, Tomoya MORINAGA , Tomoya MORINAGA Subject: [PATCH 3/7 v3] i2c-eg20t: delete 10bit access processing Date: Thu, 6 Oct 2011 15:56:28 +0900 Message-Id: <1317884192-10694-4-git-send-email-tomoya-linux@dsn.lapis-semi.com> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1317884192-10694-1-git-send-email-tomoya-linux@dsn.lapis-semi.com> References: <1317884192-10694-1-git-send-email-tomoya-linux@dsn.lapis-semi.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tomoya MORINAGA Linux I2C core doesn't support 10bit access formally. Additionally, we can't test with 10bit mode. This patch deletes the 10bit access processing. Signed-off-by: Tomoya MORINAGA --- drivers/i2c/busses/i2c-eg20t.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index c5b9924..aa1705e 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -410,7 +410,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, } if (msgs->flags & I2C_M_TEN) { - addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7); + addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7) & 0x06; iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR); if (first) pch_i2c_start(adap); @@ -515,7 +515,6 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, if (msgs->flags & I2C_M_TEN) { addr_2_msb = (((addr & I2C_MSB_2B_MSK) >> 7) | (I2C_RD)); iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR); - } else { /* 7 address bits + R/W bit */ addr = (((addr) << 1) | (I2C_RD)); -- 1.7.4.4