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From: David Woodhouse <dwmw2@infradead.org>
To: cody <mail.kai.huang@gmail.com>
Cc: Alex Williamson <alex.williamson@redhat.com>,
	rajesh.sankaran@intel.com, iommu@lists.linux-foundation.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	chrisw@sous-sol.org, ddutile@redhat.com
Subject: Re: [PATCH] intel-iommu: Manage iommu_coherency globally
Date: Tue, 22 Nov 2011 15:41:37 +0000	[thread overview]
Message-ID: <1321976497.6971.6.camel@i7.infradead.org> (raw)
In-Reply-To: <4ECCA102.4040501@gmail.com>

On Tue, 2011-11-22 at 23:30 -0800, cody wrote:
> I have a question, Intel VT-d manual says the coherency bit is "RO", how 
> can it be configurable by the BIOS? Or there's another way to configure 
> the IOMMU to be coherent or non-coherent? (I didn't find such info in 
> the manual. I missed it?) 

It's not in the manual. We hide it so that only the BIOS can set it.
It's only read-only to *you*, the operating system that's supposed to
have control of the hardware.

You might think that we should expose it to the OS so that it can be set
according to the *usage* — so perhaps you'd set it non-coherent for VM
use (where you rarely modify the page tables) and coherent for
host-based DMA protection (where the constant clflushes in the fast path
cause a 10% performance hit on network bandwidth testing).

However, that would not be consistent with our goal of ensuring that the
BIOS can *always* screw you over as much as possible.

-- 
dwmw2


      reply	other threads:[~2011-11-22 15:41 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-11-16  4:11 Alex Williamson
2011-11-16 10:28 ` Chris Wright
2011-11-18 12:03 ` David Woodhouse
2011-11-18 16:03   ` Alex Williamson
2011-11-18 17:00     ` David Woodhouse
2011-11-18 17:15       ` Alex Williamson
2011-11-18 18:15         ` David Woodhouse
2011-11-19 19:17   ` Chris Wright
2011-11-19 20:11     ` David Woodhouse
2011-11-23  7:30   ` cody
2011-11-22 15:41     ` David Woodhouse [this message]

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