From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759344Ab2CBU6c (ORCPT ); Fri, 2 Mar 2012 15:58:32 -0500 Received: from mail-gx0-f174.google.com ([209.85.161.174]:63893 "EHLO mail-gx0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756008Ab2CBU63 (ORCPT ); Fri, 2 Mar 2012 15:58:29 -0500 Authentication-Results: mr.google.com; spf=pass (google.com: domain of alan@signal11.us designates 10.236.179.67 as permitted sender) smtp.mail=alan@signal11.us MIME-Version: 1.0 From: Alan Ott To: Colin Cross , Olof Johansson , Stephen Warren , Russell King , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Arnd Bergmann , Alan Ott Subject: [PATCH v2 2/6] ARM: tegra: select CPU_FREQ_TABLE Date: Fri, 2 Mar 2012 15:58:28 -0500 Message-Id: <1330721908-8633-1-git-send-email-alan@signal11.us> X-Mailer: git-send-email 1.7.0.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Arnd Bergmann The tegra cpufreq implementation relies on the cpu_freq_table code, so make sure that this is always there when needed. Signed-off-by: Arnd Bergmann Signed-off-by: Alan Ott --- arch/arm/mach-tegra/Kconfig | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 373652d..60f3e4b 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -10,6 +10,7 @@ config ARCH_TEGRA_2x_SOC select USB_ARCH_HAS_EHCI if USB_SUPPORT select USB_ULPI if USB_SUPPORT select USB_ULPI_VIEWPORT if USB_SUPPORT + select CPU_FREQ_TABLE if CPU_FREQ help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller @@ -23,6 +24,7 @@ config ARCH_TEGRA_3x_SOC select USB_ULPI if USB_SUPPORT select USB_ULPI_VIEWPORT if USB_SUPPORT select USE_OF + select CPU_FREQ_TABLE if CPU_FREQ help Support for NVIDIA Tegra T30 processor family, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller -- 1.7.0.4