From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933155AbdKACOm (ORCPT ); Tue, 31 Oct 2017 22:14:42 -0400 Received: from mail-pg0-f66.google.com ([74.125.83.66]:54721 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932667AbdKACOk (ORCPT ); Tue, 31 Oct 2017 22:14:40 -0400 X-Google-Smtp-Source: ABhQp+SvbvQ71DtLIFtxtp+YmrPr8R3dzp0tD3oS9sXbqmMO6V9d6uqosjwTy5YykYAVrbZqaRM1aA== Subject: Re: [PATCH] hwmon: (aspeed-pwm-tacho) Deassert reset in probe To: Stafford Horne Cc: Joel Stanley , Rob Herring , Philipp Zabel , Mykola Kostenok , Jaghathiswari Rankappagounder Natarajan , devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org References: <20171101013421.8488-1-joel@jms.id.au> <20171101020433.GF29237@lianli.shorne-pla.net> From: Guenter Roeck Message-ID: <1331f460-d34b-02b2-d41a-3d0ec9543bb5@roeck-us.net> Date: Tue, 31 Oct 2017 19:14:37 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20171101020433.GF29237@lianli.shorne-pla.net> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/31/2017 07:04 PM, Stafford Horne wrote: > On Tue, Oct 31, 2017 at 06:53:15PM -0700, Guenter Roeck wrote: >> On 10/31/2017 06:34 PM, Joel Stanley wrote: >>> The ASPEED SoC must deassert a reset in order to use the PWM/tach >>> peripheral. >>> >>> The device tree bindings are updated to document the resets phandle, and >>> the example is updated to match what is expected for both the reset and >>> clock phandle. Note that the bindings should have always had the reset >>> controller, as the hardware is unusable without it. >>> >>> Signed-off-by: Joel Stanley >> >> Presumably the driver is being used. This change makes it incompatible with >> existing users. This is unacceptable; after all, it is possible that the >> device is taken out of reset by ROMMON or BIOS. >> >> On top of that, the reset controller code is quite strict and issues a >> backtrace if CONFIG_RESET_CONTROLLER is not enabled. Yet, there is no >> dependency added on RESET_CONTROLLER. You might want to consider making >> the new control optional and using devm_reset_control_get_optional_exclusive(). >> >> The DT change should be a separate patch. >> >> More comments below. > > [..] > >>> return PTR_ERR_OR_ZERO(hwmon); >>> } >>> +static int aspeed_pwm_tacho_remove(struct platform_device *pdev) >>> +{ >>> + struct aspeed_pwm_tacho_data *priv = platform_get_drvdata(pdev); >>> + >>> + reset_control_deassert(priv->rst); >> >> This seems to be quite pointless. Also, did you test this code ? >> >>> + >>> + return 0; >>> +} >>> + >>> static const struct of_device_id of_pwm_tacho_match_table[] = { >>> { .compatible = "aspeed,ast2400-pwm-tacho", }, >>> { .compatible = "aspeed,ast2500-pwm-tacho", }, >>> @@ -969,6 +989,7 @@ MODULE_DEVICE_TABLE(of, of_pwm_tacho_match_table); >>> static struct platform_driver aspeed_pwm_tacho_driver = { >>> .probe = aspeed_pwm_tacho_probe, >>> + .probe = aspeed_pwm_tacho_remove, > > Also, this cant be right (should be .remove)? > Nice. Makes me really wonder what this code would do. Does this even compile ? Guenter