From: xiong <xiong@qca.qualcomm.com>
To: <davem@davemloft.net>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <qca-linux-team@qualcomm.com>, <nic-devel@qualcomm.com>,
xiong <xiong@qca.qualcomm.com>
Subject: [PATCH 3/9] atl1c: remove PHY contrl in atl1c_reset_pcie
Date: Fri, 20 Apr 2012 14:16:18 +0800 [thread overview]
Message-ID: <1334902584-15584-4-git-send-email-xiong@qca.qualcomm.com> (raw)
In-Reply-To: <1334902584-15584-1-git-send-email-xiong@qca.qualcomm.com>
atl1c_reset_phy follows atl1c_reset_pcie in the whole driver,
so, it's unnecessary to add PHY control code in atl1c_reset_pcie.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 11 ++---------
1 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 1f82880..f0f348b 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -165,11 +165,6 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
atl1c_pcie_patch(hw);
if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
atl1c_disable_l0s_l1(hw);
- if (flag & ATL1C_PCIE_PHY_RESET)
- AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
- else
- AT_WRITE_REG(hw, REG_GPHY_CTRL,
- GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
msleep(5);
}
@@ -2409,8 +2404,7 @@ static int atl1c_resume(struct device *dev)
struct atl1c_adapter *adapter = netdev_priv(netdev);
AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
- atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
- ATL1C_PCIE_PHY_RESET);
+ atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
atl1c_phy_reset(&adapter->hw);
atl1c_reset_mac(&adapter->hw);
@@ -2568,8 +2562,7 @@ static int __devinit atl1c_probe(struct pci_dev *pdev,
dev_err(&pdev->dev, "net device private data init failed\n");
goto err_sw_init;
}
- atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
- ATL1C_PCIE_PHY_RESET);
+ atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
/* Init GPHY as early as possible due to power saving issue */
atl1c_phy_reset(&adapter->hw);
--
1.7.7
next prev parent reply other threads:[~2012-04-20 6:17 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-20 6:16 [PATCH 0/9] atl1c: update hardware settings - v3 xiong
2012-04-20 6:16 ` [PATCH 1/9] atl1c: remove REG_PHY_STATUS xiong
2012-04-20 6:16 ` [PATCH 2/9] atl1c: refine phy-register read/write function xiong
2012-04-20 7:40 ` Florian Fainelli
2012-04-20 8:54 ` Huang, Xiong
2012-04-20 6:16 ` xiong [this message]
2012-04-20 6:16 ` [PATCH 4/9] atl1c: refine SERDES-clock related code xiong
2012-04-20 6:16 ` [PATCH 5/9] atl1c: remove PHY polling from atl1c_open xiong
2012-04-20 6:16 ` [PATCH 6/9] atl1c: update PHY reset related routine xiong
2012-04-20 6:16 ` [PATCH 7/9] atl1c: remove PHY reset/init for link down event xiong
2012-04-20 6:16 ` [PATCH 8/9] atl1c: add function atl1c_power_saving xiong
2012-04-20 6:16 ` [PATCH 9/9] atl1c: refine start/enable code for MAC module xiong
2012-04-20 10:34 ` [PATCH 0/9] atl1c: update hardware settings - v3 Huang, Xiong
2012-04-20 17:20 ` David Miller
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