From: Alex Shi <alex.shi@intel.com>
To: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
rostedt@goodmis.org, fweisbec@gmail.com, bp@amd64.org,
npiggin@gmail.com
Cc: jeremy@goop.org, riel@redhat.com, luto@mit.edu,
alex.shi@intel.com, avi@redhat.com, len.brown@intel.com,
dhowells@redhat.com, fenghua.yu@intel.com, yinghai@kernel.org,
borislav.petkov@amd.com, ak@linux.intel.com, cpw@sgi.com,
steiner@sgi.com, akpm@linux-foundation.org, penberg@kernel.org,
yongjie.ren@intel.com, linux-kernel@vger.kernel.org
Subject: [PATH v2 5/5] x86/tlb: remove comments for tlb_flush_range implement suggestion
Date: Fri, 4 May 2012 14:50:10 +0800 [thread overview]
Message-ID: <1336114210-25687-6-git-send-email-alex.shi@intel.com> (raw)
In-Reply-To: <1336114210-25687-1-git-send-email-alex.shi@intel.com>
Thanks to this comments that inspired me using invlpg to replace cr3
rewrite.
Now, it is time to remove from code to avoid reader confusing.
Signed-off-by: Alex Shi <alex.shi@intel.com>
---
arch/x86/include/asm/tlbflush.h | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index ec30dfb..51f8b1c 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -81,10 +81,6 @@ static inline void __flush_tlb_one(unsigned long addr)
*
* ..but the i386 has somewhat limited tlb flushing capabilities,
* and page-granular flushes are available only on i486 and up.
- *
- * x86-64 can only flush individual pages or full VMs. For a range flush
- * we always do the full VM. Might be worth trying if for a small
- * range a few INVLPGs in a row are a win.
*/
#ifndef CONFIG_SMP
--
1.7.0.1
prev parent reply other threads:[~2012-05-04 6:51 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-04 6:50 [PATCH v2 0/5] tlb_flush_range optimization Alex Shi
2012-05-04 6:50 ` [PATH v2 1/5] x86/tlb_info: get last level TLB entry number of CPU Alex Shi
2012-05-04 6:50 ` [PATH v2 2/5] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range Alex Shi
2012-05-04 6:50 ` [PATH v2 3/5] x86/tlb: fall back to flush all when meet a THP large page Alex Shi
[not found] ` <CAJd=RBDi1cJ=HmjoLdMG1hMU5GZNDV5ysXqvCT9PP09rEi342w@mail.gmail.com>
2012-05-04 12:22 ` Hillf Danton
[not found] ` <4FA3D2DF.9070000@intel.com>
2012-05-04 13:38 ` Hillf Danton
2012-05-04 6:50 ` [PATH v2 4/5] x86/tlb: add tlb flush all factor for specific CPUs Alex Shi
2012-05-04 6:50 ` Alex Shi [this message]
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