[PATCH 1/2] perf, x86: Add basic Ivy Bridge support

[Andi Kleen <andi@firstfloor.org>]

From: Andi Kleen <ak@linux.intel.com>

Very similar to Sandy Bridge, but there is no PEBS problem.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
 arch/x86/kernel/cpu/perf_event_intel.c |    9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 166546e..1249c56 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1698,6 +1698,7 @@ __init int intel_pmu_init(void)
 	union cpuid10_ebx ebx;
 	unsigned int unused;
 	int version;
+	char *name;
 
 	if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
 		switch (boot_cpu_data.x86) {
@@ -1839,9 +1840,15 @@ __init int intel_pmu_init(void)
 		pr_cont("Westmere events, ");
 		break;
 
+	case 58: /* IvyBridge */
+		name = "Ivy";
+		goto snb_ivb_common;
+
 	case 42: /* SandyBridge */
 		x86_add_quirk(intel_sandybridge_quirk);
 	case 45: /* SandyBridge, "Romely-EP" */
+		name = "Sandy";
+	snb_ivb_common:
 		memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
 		       sizeof(hw_cache_event_ids));
 
@@ -1861,7 +1868,7 @@ __init int intel_pmu_init(void)
 		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =
 			X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1);
 
-		pr_cont("SandyBridge events, ");
+		pr_cont("%sBridge events, ", name);
 		break;
 
 	default:
-- 
1.7.7.6