From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964910Ab2FHVp5 (ORCPT ); Fri, 8 Jun 2012 17:45:57 -0400 Received: from mga09.intel.com ([134.134.136.24]:14373 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934508Ab2FHVpq (ORCPT ); Fri, 8 Jun 2012 17:45:46 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.67,352,1309762800"; d="scan'208";a="150325266" From: Andi Kleen To: mingo@elte.hu Cc: eranian@google.com, linux-kernel@vger.kernel.org, Andi Kleen Subject: [PATCH 1/2] perf, x86: Add basic Ivy Bridge support v2 Date: Fri, 8 Jun 2012 14:45:27 -0700 Message-Id: <1339191928-13223-2-git-send-email-andi@firstfloor.org> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1339191928-13223-1-git-send-email-andi@firstfloor.org> References: <1339191928-13223-1-git-send-email-andi@firstfloor.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andi Kleen Very similar to Sandy Bridge, but there is no PEBS problem. As Stephane pointed out .code=0xb1, .umask=0x01 is gone, so don't do a generic backend stall event on IvyBridge. v2: Remove stall event Signed-off-by: Andi Kleen Conflicts: arch/x86/kernel/cpu/perf_event_intel.c --- arch/x86/kernel/cpu/perf_event_intel.c | 16 ++++++++++++++-- 1 files changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index e23e71f..4d6188d 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -1767,6 +1767,7 @@ __init int intel_pmu_init(void) union cpuid10_ebx ebx; unsigned int unused; int version; + char *name; if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) { switch (boot_cpu_data.x86) { @@ -1910,10 +1911,21 @@ __init int intel_pmu_init(void) pr_cont("Westmere events, "); break; + case 58: /* IvyBridge */ + name = "Ivy"; + /* No backend stall event */ + goto snb_ivb_common; + case 42: /* SandyBridge */ case 45: /* SandyBridge, "Romely-EP" */ x86_add_quirk(intel_sandybridge_quirk); - case 58: /* IvyBridge */ + name = "Sandy"; + + /* UOPS_DISPATCHED.THREAD,c=1,i=1 to count stall cycles*/ + intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = + X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1); + + snb_ivb_common: memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, sizeof(hw_cache_event_ids)); @@ -1934,7 +1946,7 @@ __init int intel_pmu_init(void) intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1); - pr_cont("SandyBridge events, "); + pr_cont("%sBridge events, ", name); break; default: -- 1.7.7.6