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From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
To: Nicolas Dufresne <nicolas.dufresne@collabora.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>
Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@collabora.com
Subject: Re: [PATCH] media: verisilicon: Enable wide 4K in AV1 decoder
Date: Fri, 4 Apr 2025 11:10:25 +0200	[thread overview]
Message-ID: <133924c6-57ca-47ed-9e32-87b75b975f1c@collabora.com> (raw)
In-Reply-To: <20250403-hantro-av1-wuhd-v1-1-334629cb7f63@collabora.com>


Le 03/04/2025 à 21:07, Nicolas Dufresne a écrit :
> Tested on RK3588, this decoder is capable of handling WUHD, so bump the
> maximum width and height accordingly.
>
> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>

Thanks for the patch.

Reviewed-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>

> ---
>   drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 20 ++++++++++----------
>   1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
> index 964122e7c355934cd80eb442219f6ba51bba8b71..b64f0658f7f1e77b3efd960b35cd54dec4edf4ef 100644
> --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
> +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
> @@ -85,10 +85,10 @@ static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = {
>   		.postprocessed = true,
>   		.frmsize = {
>   			.min_width = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_width = FMT_UHD_WIDTH,
> +			.max_width = FMT_4K_WIDTH,
>   			.step_width = MB_DIM,
>   			.min_height = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_height = FMT_UHD_HEIGHT,
> +			.max_height = FMT_4K_HEIGHT,
>   			.step_height = MB_DIM,
>   		},
>   	},
> @@ -99,10 +99,10 @@ static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = {
>   		.postprocessed = true,
>   		.frmsize = {
>   			.min_width = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_width = FMT_UHD_WIDTH,
> +			.max_width = FMT_4K_WIDTH,
>   			.step_width = MB_DIM,
>   			.min_height = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_height = FMT_UHD_HEIGHT,
> +			.max_height = FMT_4K_HEIGHT,
>   			.step_height = MB_DIM,
>   		},
>   	},
> @@ -318,10 +318,10 @@ static const struct hantro_fmt rockchip_vpu981_dec_fmts[] = {
>   		.match_depth = true,
>   		.frmsize = {
>   			.min_width = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_width = FMT_UHD_WIDTH,
> +			.max_width = FMT_4K_WIDTH,
>   			.step_width = MB_DIM,
>   			.min_height = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_height = FMT_UHD_HEIGHT,
> +			.max_height = FMT_4K_HEIGHT,
>   			.step_height = MB_DIM,
>   		},
>   	},
> @@ -331,10 +331,10 @@ static const struct hantro_fmt rockchip_vpu981_dec_fmts[] = {
>   		.match_depth = true,
>   		.frmsize = {
>   			.min_width = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_width = FMT_UHD_WIDTH,
> +			.max_width = FMT_4K_WIDTH,
>   			.step_width = MB_DIM,
>   			.min_height = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_height = FMT_UHD_HEIGHT,
> +			.max_height = FMT_4K_HEIGHT,
>   			.step_height = MB_DIM,
>   		},
>   	},
> @@ -344,10 +344,10 @@ static const struct hantro_fmt rockchip_vpu981_dec_fmts[] = {
>   		.max_depth = 2,
>   		.frmsize = {
>   			.min_width = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_width = FMT_UHD_WIDTH,
> +			.max_width = FMT_4K_WIDTH,
>   			.step_width = MB_DIM,
>   			.min_height = ROCKCHIP_VPU981_MIN_SIZE,
> -			.max_height = FMT_UHD_HEIGHT,
> +			.max_height = FMT_4K_HEIGHT,
>   			.step_height = MB_DIM,
>   		},
>   	},
>
> ---
> base-commit: f2151613e040973c868d28c8b00885dfab69eb75
> change-id: 20250403-hantro-av1-wuhd-11e2cf5be1a4
>
> Best regards,

      reply	other threads:[~2025-04-04  9:10 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-03 19:07 Nicolas Dufresne
2025-04-04  9:10 ` Benjamin Gaignard [this message]

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