From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 800EF238166; Thu, 11 Sep 2025 15:46:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757605601; cv=none; b=nfOJObZqWM3Z7QzwP71ztA9+GrtKZ6z8r0IPgbkzoH0l9fJkSyVYTJM+tcbvkyDzUMbpIm1k3M3oJb3GlryKS4kFWWCILu7l7C+0kg6Os8PYuAolM+daszCqbYOJnOed4WSMbqRB2RAYGtJb+oMKzzU4Bqf0Qr9iGPjWgF9tqic= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757605601; c=relaxed/simple; bh=oYPnuFVGWGmBuWcZz23Xs+W7ls+3IbHxQztswQ+eYo4=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=mrOT47RTmAHcEyGPvohDKoom/wpTI4+xACGg6pejo1N2SebzXnJydODkOa3CVSBk3KqdwHww5cfo9y1/faVdl8LVMtcuCVWn/cOqY6nQyCM7yuFAV4fe6ErENl/aFC+2Kv9/SayBTeHuuBl2B38VusCKomYgHoD1Lkh8um4451E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 87A14153B; Thu, 11 Sep 2025 08:46:30 -0700 (PDT) Received: from [10.1.196.46] (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 62B683F63F; Thu, 11 Sep 2025 08:46:34 -0700 (PDT) Message-ID: <1344b395-66aa-4714-b1fc-9c970c0fd0bf@arm.com> Date: Thu, 11 Sep 2025 16:46:32 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 23/29] arm_mpam: Add mpam_msmon_read() to read monitor value To: James Morse , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org Cc: D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Rob Herring , Rohit Mathew , Rafael Wysocki , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Danilo Krummrich References: <20250910204309.20751-1-james.morse@arm.com> <20250910204309.20751-24-james.morse@arm.com> From: Ben Horgan Content-Language: en-US In-Reply-To: <20250910204309.20751-24-james.morse@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi James, On 9/10/25 21:43, James Morse wrote: > Reading a monitor involves configuring what you want to monitor, and > reading the value. Components made up of multiple MSC may need values > from each MSC. MSCs may take time to configure, returning 'not ready'. > The maximum 'not ready' time should have been provided by firmware. > > Add mpam_msmon_read() to hide all this. If (one of) the MSC returns > not ready, then wait the full timeout value before trying again. > > CC: Shanker Donthineni > Signed-off-by: James Morse > --- > Changes since v1: > * Added XCL support. > * Merged FLT/CTL constants. > * a spelling mistake in a comment. > * moved structrues around. > --- > drivers/resctrl/mpam_devices.c | 226 ++++++++++++++++++++++++++++++++ > drivers/resctrl/mpam_internal.h | 19 +++ > 2 files changed, 245 insertions(+) > > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index cf190f896de1..1543c33c5d6a 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -898,6 +898,232 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc) > return 0; > } > > +struct mon_read { > + struct mpam_msc_ris *ris; > + struct mon_cfg *ctx; > + enum mpam_device_features type; > + u64 *val; > + int err; > +}; > + > +static void gen_msmon_ctl_flt_vals(struct mon_read *m, u32 *ctl_val, > + u32 *flt_val) > +{ > + struct mon_cfg *ctx = m->ctx; > + > + /* > + * For CSU counters its implementation-defined what happens when not > + * filtering by partid. > + */ > + *ctl_val |= MSMON_CFG_x_CTL_MATCH_PARTID; > + > + *flt_val = FIELD_PREP(MSMON_CFG_x_FLT_PARTID, ctx->partid); > + if (m->ctx->match_pmg) { > + *ctl_val |= MSMON_CFG_x_CTL_MATCH_PMG; > + *flt_val |= FIELD_PREP(MSMON_CFG_x_FLT_PMG, ctx->pmg); > + } > + > + switch (m->type) { > + case mpam_feat_msmon_csu: > + *ctl_val = MSMON_CFG_CSU_CTL_TYPE_CSU; > + > + if (mpam_has_feature(mpam_feat_msmon_csu_xcl, &m->ris->props)) > + *flt_val |= FIELD_PREP(MSMON_CFG_CSU_FLT_XCL, > + ctx->csu_exclude_clean); > + > + break; > + case mpam_feat_msmon_mbwu: > + *ctl_val = MSMON_CFG_MBWU_CTL_TYPE_MBWU; > + > + if (mpam_has_feature(mpam_feat_msmon_mbwu_rwbw, &m->ris->props)) > + *flt_val |= FIELD_PREP(MSMON_CFG_MBWU_FLT_RWBW, ctx->opts); > + > + break; > + default: > + return; > + } > +} > + > +static void read_msmon_ctl_flt_vals(struct mon_read *m, u32 *ctl_val, > + u32 *flt_val) > +{ > + struct mpam_msc *msc = m->ris->vmsc->msc; > + > + switch (m->type) { > + case mpam_feat_msmon_csu: > + *ctl_val = mpam_read_monsel_reg(msc, CFG_CSU_CTL); > + *flt_val = mpam_read_monsel_reg(msc, CFG_CSU_FLT); > + break; > + case mpam_feat_msmon_mbwu: > + *ctl_val = mpam_read_monsel_reg(msc, CFG_MBWU_CTL); > + *flt_val = mpam_read_monsel_reg(msc, CFG_MBWU_FLT); > + break; > + default: > + return; > + } > +} > + > +/* Remove values set by the hardware to prevent apparent mismatches. */ > +static void clean_msmon_ctl_val(u32 *cur_ctl) > +{ > + *cur_ctl &= ~MSMON_CFG_x_CTL_OFLOW_STATUS; > +} > + > +static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val, > + u32 flt_val) > +{ > + struct mpam_msc *msc = m->ris->vmsc->msc; > + > + /* > + * Write the ctl_val with the enable bit cleared, reset the counter, > + * then enable counter. > + */ > + switch (m->type) { > + case mpam_feat_msmon_csu: > + mpam_write_monsel_reg(msc, CFG_CSU_FLT, flt_val); > + mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val); > + mpam_write_monsel_reg(msc, CSU, 0); > + mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val | MSMON_CFG_x_CTL_EN); > + break; > + case mpam_feat_msmon_mbwu: > + mpam_write_monsel_reg(msc, CFG_MBWU_FLT, flt_val); > + mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val); > + mpam_write_monsel_reg(msc, MBWU, 0); > + mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val | MSMON_CFG_x_CTL_EN); > + break; > + default: > + return; > + } > +} > + > +/* Call with MSC lock held */ > +static void __ris_msmon_read(void *arg) > +{ > + u64 now; > + bool nrdy = false; > + struct mon_read *m = arg; > + struct mon_cfg *ctx = m->ctx; > + struct mpam_msc_ris *ris = m->ris; > + struct mpam_props *rprops = &ris->props; > + struct mpam_msc *msc = m->ris->vmsc->msc; > + u32 mon_sel, ctl_val, flt_val, cur_ctl, cur_flt; > + > + if (!mpam_mon_sel_lock(msc)) { > + m->err = -EIO; > + return; > + } > + mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, ctx->mon) | > + FIELD_PREP(MSMON_CFG_MON_SEL_RIS, ris->ris_idx); > + mpam_write_monsel_reg(msc, CFG_MON_SEL, mon_sel); > + > + /* > + * Read the existing configuration to avoid re-writing the same values. > + * This saves waiting for 'nrdy' on subsequent reads. > + */ > + read_msmon_ctl_flt_vals(m, &cur_ctl, &cur_flt); > + clean_msmon_ctl_val(&cur_ctl); > + gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val); > + if (cur_flt != flt_val || cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN)) > + write_msmon_ctl_flt_vals(m, ctl_val, flt_val); > + > + switch (m->type) { > + case mpam_feat_msmon_csu: > + now = mpam_read_monsel_reg(msc, CSU); > + if (mpam_has_feature(mpam_feat_msmon_csu_hw_nrdy, rprops)) > + nrdy = now & MSMON___NRDY; > + break; > + case mpam_feat_msmon_mbwu: > + now = mpam_read_monsel_reg(msc, MBWU); > + if (mpam_has_feature(mpam_feat_msmon_mbwu_hw_nrdy, rprops)) > + nrdy = now & MSMON___NRDY; > + break; > + default: > + m->err = -EINVAL; > + break; > + } > + mpam_mon_sel_unlock(msc); > + > + if (nrdy) { > + m->err = -EBUSY; > + return; > + } > + > + now = FIELD_GET(MSMON___VALUE, now); > + *m->val += now; > +} > + > +static int _msmon_read(struct mpam_component *comp, struct mon_read *arg) > +{ > + int err, idx; > + struct mpam_msc *msc; > + struct mpam_vmsc *vmsc; > + struct mpam_msc_ris *ris; > + > + idx = srcu_read_lock(&mpam_srcu); > + list_for_each_entry_rcu(vmsc, &comp->vmsc, comp_list) { This can be list_for_each_entry_srcu(). (I thought I'd already commented but turns out that was on another patch.) > + msc = vmsc->msc; > + > + list_for_each_entry_rcu(ris, &vmsc->ris, vmsc_list) { Also here. [...] Thanks, Ben