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Mon, 25 Mar 2024 13:15:59 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42PDFw0h030262 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 25 Mar 2024 13:15:58 GMT Received: from [10.216.25.244] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 25 Mar 2024 06:15:53 -0700 Message-ID: <135446e7-5667-4ead-b2ab-78350100660d@quicinc.com> Date: Mon, 25 Mar 2024 18:45:53 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v16 9/9] usb: dwc3: qcom: Add multiport suspend/resume support for wrapper Content-Language: en-US To: Johan Hovold CC: Krzysztof Kozlowski , Rob Herring , Bjorn Andersson , Wesley Cheng , Konrad Dybcio , "Greg Kroah-Hartman" , Conor Dooley , Thinh Nguyen , Felipe Balbi , , , , , , References: <20240307062052.2319851-1-quic_kriskura@quicinc.com> <20240307062052.2319851-10-quic_kriskura@quicinc.com> From: Krishna Kurapati PSSNV In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: k9vb1_D6GEHZIxdoEmlrXp8dnBk2BcKS X-Proofpoint-GUID: k9vb1_D6GEHZIxdoEmlrXp8dnBk2BcKS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-25_08,2024-03-21_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 impostorscore=0 clxscore=1015 mlxlogscore=811 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403210001 definitions=main-2403250073 On 3/25/2024 6:22 PM, Johan Hovold wrote: > On Thu, Mar 07, 2024 at 11:50:52AM +0530, Krishna Kurapati wrote: >> Power event IRQ is used for wakeup in cases: >> a) where the controller is super speed capable and missing an >> ss_phy interrupt. >> b) where the GIC is not capable of detecting DP/DM hs phy irq's. >> >> Power event IRQ stat register indicates whether high speed phy >> entered and exited L2 successfully during suspend and resume. >> Indicate the same for all ports of multiport. >> >> Signed-off-by: Krishna Kurapati > >> @@ -471,9 +480,12 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup) >> if (ret) >> dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret); >> >> + for (i = 0; i < qcom->num_ports; i++) { >> /* Clear existing events from PHY related to L2 in/out */ > > This comment either needs to be moved above the for-loop or be indented > one level in. Ah yes, missed it. Will move it out of the loop. > >> - dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG, >> - PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); >> + dwc3_qcom_setbits(qcom->qscratch_base, >> + pwr_evnt_irq_stat_reg[i], >> + PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); >> + } >> >> qcom->is_suspended = false; > > With the above fixed: > > Reviewed-by: Johan Hovold Thanks for the review. Regards, Krishna,