[PATCH 2/2] Documentation: add docs for 88pm80x dt

[Qing Xu <qingx@marvell.com>]

From: Qing Xu <qingx@marvell.com>

Signed-off-by: Qing Xu <qingx@marvell.com>
---
 Documentation/devicetree/bindings/mfd/88pm80x.txt |   52 +++++++++++++++++++++
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 create mode 100644 Documentation/devicetree/bindings/mfd/88pm80x.txt

diff --git a/Documentation/devicetree/bindings/mfd/88pm80x.txt b/Documentation/devicetree/bindings/mfd/88pm80x.txt
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+* Marvell 88pm80x Power Management IC
+
+Required parent device properties:
+- compatible : "marvell,88pm80x"
+- reg : the I2C slave address for the 88pm80x chip
+- interrupts : IRQ line for the 88pm80x chip
+- interrupt-controller: describes the 88pm80x as an interrupt controller (has its own domain)
+- #interrupt-cells : should be 1.
+	- The cell is the 88pm80x local IRQ number
+
+Optional parent device properties:
+- marvell,88pm80x-irqmode: inicates whether interrupt status is cleared by read
+- marvell,88pm80x-poweraddr: 88pm80x are multi-chips solution. <reg> stores the I2C address
+				of one chip, and this property stores the I2C address of
+				power related chip.
+- marvell,88pm80x-gpadcaddr: 88pm80x are multi-chips solution. <reg> stores the I2C address
+				of one chip, and this property stores the I2C address of
+				gpadc related chip.
+
+88pm80x consists of various groups of sub-devices:
+
+Device			 Supply Names	 Description
+------			 ------------	 -----------
+88pm80x-onkey		:		: On key
+88pm80x-rtc		:		: RTC
+
+Example:
+	pmic: 88pm800@30 {
+		compatible = "marvell,88pm80x";
+		reg = <0x30>;
+		interrupts = <4>;
+		interrupt-parent = <&intc>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+
+		marvell,88pm80x-irqmode = 0;
+		marvell,88pm80x-poweraddr = <0x31>;
+		marvell,88pm80x-gpadcaddr = <0x32>;
+	};
+
+
+	pmic: 88pm805@38 {
+		compatible = "marvell,88pm80x";
+		reg = <0x38>;
+		interrupts = <124>;
+		interrupt-parent = <&gpio>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+
+		marvell,88pm80x-irqmode = 0;
+	};
+
-- 
1.7.0.4