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b=q5mtzAGGzJ2QOJec126E8VjelXId60AjZOGQijBxFvwsJK9l5REb5vgyjQtbz8yEmrwZFNJ55kdopwMuzAYtbhKKWJd/WgoLj9uR6wevGgYXjyT/eOylDtW3OtgsBoKAXfHe/NurTcvn+VULMYOqs34AF7SXQZZeHUwHC2AtqkM= Authentication-Results: mx.microsoft.com 1; dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Received: from BL4PR12MB9505.namprd12.prod.outlook.com (2603:10b6:208:591::16) by CH3PR12MB8403.namprd12.prod.outlook.com (2603:10b6:610:133::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.522.19; Mon, 19 Oct 2026 06:41:15 +0000 Received: from BL4PR12MB9505.namprd12.prod.outlook.com ([fe80::73aa:eb8c:a86b:5a83]) by BL4PR12MB9505.namprd12.prod.outlook.com ([fe80::73aa:eb8c:a86b:5a83%5]) with mapi id 15.21.0522.017; Mon, 19 Oct 2026 06:41:15 +0000 Message-ID: <1354ad92-cb51-405b-8808-265f2f431f46@amd.com> Date: Mon, 19 Oct 2026 12:10:57 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 03/24] iommu/amd: Detect and initialize AMD vIOMMU feature To: Suravee Suthikulpanit , linux-kernel@vger.kernel.org, iommu@lists.linux.dev, joro@8bytes.org, jgg@nvidia.com Cc: yi.l.liu@intel.com, kevin.tian@intel.com, nicolinc@nvidia.com, jon.grimm@amd.com, santosh.shukla@amd.com, Sairaj.K@amd.com, jay.chen@amd.com, Ming.Shu@amd.com, SooJin.Tan@amd.com, chrisl@kernel.org, wvw@google.com, wnliu@google.com, dantuluris@google.com, kpsingh@google.com, alejandro.j.jimenez@oracle.com, joao.m.martins@oracle.com, guanghuifeng@linux.alibaba.com References: <20260930092344.5616-1-suravee.suthikulpanit@amd.com> <20260930092344.5616-4-suravee.suthikulpanit@amd.com> Content-Language: en-US From: Vasant Hegde In-Reply-To: <20260930092344.5616-4-suravee.suthikulpanit@amd.com> Content-Type: text/plain; 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Please see the AMD IOMMU > specification[1] for more detail. > > Gate amd_viommu_init() on this IOMMU's EFR[VIOMMUSup] > (iommu->features) at the PCI init call site. Do not use > check_feature()/amd_iommu_efr; that global mask is the AND of > every IOMMU. Do not fail other IOMMUs when one instance lacks > the bit or init fails. > > Set AMD_IOMMU_FLAG_VIOMMU_EN when amd_viommu_init() succeeds. > Log PCI names of IOMMUs that have that flag set. > > Forward-declare struct amd_iommu in amd_viommu.h so the header > is self-contained. > > When CONFIG_AMD_IOMMU_IOMMUFD is off, the amd_viommu_init() stub > returns 0 so a missing build is not logged as an init failure on > EFR[VIOMMUSup] hardware. > > [1] https://docs.amd.com/v/u/en-US/48882_3.11_IOMMU_PUB > > Signed-off-by: Suravee Suthikulpanit > --- > drivers/iommu/amd/Makefile | 2 +- > drivers/iommu/amd/amd_iommu.h | 5 +++++ > drivers/iommu/amd/amd_iommu_types.h | 2 ++ > drivers/iommu/amd/amd_viommu.h | 29 ++++++++++++++++++++++++ > drivers/iommu/amd/init.c | 34 +++++++++++++++++++++++++++++ > drivers/iommu/amd/viommu.c | 25 +++++++++++++++++++++ > 6 files changed, 96 insertions(+), 1 deletion(-) > create mode 100644 drivers/iommu/amd/amd_viommu.h > create mode 100644 drivers/iommu/amd/viommu.c > > diff --git a/drivers/iommu/amd/Makefile b/drivers/iommu/amd/Makefile > index 94b8ef2acb18..e1e824b9c7b0 100644 > --- a/drivers/iommu/amd/Makefile > +++ b/drivers/iommu/amd/Makefile > @@ -1,4 +1,4 @@ > # SPDX-License-Identifier: GPL-2.0-only > obj-y += iommu.o init.o quirks.o ppr.o pasid.o > -obj-$(CONFIG_AMD_IOMMU_IOMMUFD) += iommufd.o nested.o > +obj-$(CONFIG_AMD_IOMMU_IOMMUFD) += iommufd.o nested.o viommu.o > obj-$(CONFIG_AMD_IOMMU_DEBUGFS) += debugfs.o > diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h > index 71113e860859..b2ae17e3df34 100644 > --- a/drivers/iommu/amd/amd_iommu.h > +++ b/drivers/iommu/amd/amd_iommu.h > @@ -112,6 +112,11 @@ static inline bool check_feature(u64 mask) > return (amd_iommu_efr & mask); > } > > +static inline bool amd_iommu_viommu_enabled(struct amd_iommu *iommu) > +{ > + return iommu && (iommu->flags & AMD_IOMMU_FLAG_VIOMMU_EN); > +} > + > static inline bool check_feature2(u64 mask) > { > return (amd_iommu_efr2 & mask); > diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h > index 704b4c8acdc5..688cd9240790 100644 > --- a/drivers/iommu/amd/amd_iommu_types.h > +++ b/drivers/iommu/amd/amd_iommu_types.h > @@ -91,6 +91,7 @@ > #define FEATURE_HASUP BIT_ULL(49) > #define FEATURE_EPHSUP BIT_ULL(50) > #define FEATURE_HDSUP BIT_ULL(52) > +#define FEATURE_VIOMMU BIT_ULL(55) > #define FEATURE_SNP BIT_ULL(63) > > > @@ -465,6 +466,7 @@ struct irq_domain; > struct amd_irte_ops; > > #define AMD_IOMMU_FLAG_TRANS_PRE_ENABLED (1 << 0) > +#define AMD_IOMMU_FLAG_VIOMMU_EN (1 << 1) > > struct gcr3_tbl_info { > u64 *gcr3_tbl; /* Guest CR3 table */ > diff --git a/drivers/iommu/amd/amd_viommu.h b/drivers/iommu/amd/amd_viommu.h > new file mode 100644 > index 000000000000..864e7b283cff > --- /dev/null > +++ b/drivers/iommu/amd/amd_viommu.h > @@ -0,0 +1,29 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2026 Advanced Micro Devices, Inc. > + */ > + > +#ifndef AMD_VIOMMU_H > +#define AMD_VIOMMU_H > + > +struct amd_iommu; > + > +#if IS_ENABLED(CONFIG_AMD_IOMMU_IOMMUFD) > + > +int amd_viommu_init(struct amd_iommu *iommu); > + > +#else > + > +/* > + * CONFIG_AMD_IOMMU_IOMMUFD is off: host vIOMMU is not compiled in. Nit: This is redundant statement. No need to have above line. > + * Succeed as a no-op so iommu_init_pci() does not pr_err on > + * EFR[VIOMMUSup] hardware. > + */ > +static inline int amd_viommu_init(struct amd_iommu *iommu) > +{ > + return 0; > +} > + > +#endif /* CONFIG_AMD_IOMMU_IOMMUFD */ > + > +#endif /* AMD_VIOMMU_H */ > diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c > index 8a410d4aa370..c80872ce0b60 100644 > --- a/drivers/iommu/amd/init.c > +++ b/drivers/iommu/amd/init.c > @@ -34,6 +34,7 @@ > #include > > #include "amd_iommu.h" > +#include "amd_viommu.h" > #include "../irq_remapping.h" > #include "../iommu-pages.h" > > @@ -2196,6 +2197,19 @@ static int __init iommu_init_pci(struct amd_iommu *iommu) > if (check_feature(FEATURE_PPR) && amd_iommu_alloc_ppr_log(iommu)) > return -ENOMEM; > > + /* > + * vIOMMU is advertised in this IOMMU's EFR[VIOMMUSup] > + * (iommu->features). Do not use check_feature()/amd_iommu_efr; > + * that global mask is the AND of every IOMMU and can hide the > + * bit on mixed systems. > + */> + if (iommu->features & FEATURE_VIOMMU) { Please add a additional check to skip vIOMMU if amd_iommu_snp_en is true. Support w/ SNP needs PSP plumbing and not part of this series. -Vasant