From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757035Ab3AQUhq (ORCPT ); Thu, 17 Jan 2013 15:37:46 -0500 Received: from mga09.intel.com ([134.134.136.24]:33895 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753390Ab3AQUho (ORCPT ); Thu, 17 Jan 2013 15:37:44 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.84,486,1355126400"; d="scan'208";a="273439803" From: Andi Kleen To: mingo@elte.hu Cc: linux-kernel@vger.kernel.org, a.p.zijlstra@chello.nl, akpm@linux-foundation.org, acme@redhat.com, eranian@google.com, jolsa@redhat.com, namhyung@kernel.org, Andi Kleen Subject: [PATCH 06/29] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Date: Thu, 17 Jan 2013 12:36:29 -0800 Message-Id: <1358455012-12287-7-git-send-email-andi@firstfloor.org> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1358455012-12287-1-git-send-email-andi@firstfloor.org> References: <1358455012-12287-1-git-send-email-andi@firstfloor.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andi Kleen Haswell supplies the address for every PEBS memory event, so always fill it in when the user requested it. It will be 0 when not useful (no memory access) Signed-off-by: Andi Kleen --- arch/x86/kernel/cpu/perf_event_intel_ds.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index 16d7c58..aa0f5fa 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c @@ -630,6 +630,10 @@ static void __intel_pmu_pebs_event(struct perf_event *event, else regs.flags &= ~PERF_EFLAGS_EXACT; + if ((event->attr.sample_type & PERF_SAMPLE_ADDR) && + x86_pmu.intel_cap.pebs_format >= 2) + data.addr = ((struct pebs_record_v2 *)pebs)->nhm.dla; + if (has_branch_stack(event)) data.br_stack = &cpuc->lbr_stack; -- 1.7.7.6