From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753196Ab3BRNB4 (ORCPT ); Mon, 18 Feb 2013 08:01:56 -0500 Received: from [216.32.180.31] ([216.32.180.31]:46970 "EHLO va3outboundpool.messaging.microsoft.com" rhost-flags-FAIL-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1751149Ab3BRNBx (ORCPT ); Mon, 18 Feb 2013 08:01:53 -0500 X-Forefront-Antispam-Report: CIP:70.37.183.190;KIP:(null);UIP:(null);IPV:NLI;H:mail.freescale.net;RD:none;EFVD:NLI X-SpamScore: 1 X-BigFish: VS1(z551bizzz1f42h1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1155h) From: Varun Sethi To: , , , , , CC: Varun Sethi Subject: [PATCH 3/6] powerpc/fsl_pci: Added defines for the FSL PCI controller BRR1 register. Date: Mon, 18 Feb 2013 18:22:16 +0530 Message-ID: <1361191939-21260-4-git-send-email-Varun.Sethi@freescale.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1361191939-21260-1-git-send-email-Varun.Sethi@freescale.com> References: <1361191939-21260-1-git-send-email-Varun.Sethi@freescale.com> MIME-Version: 1.0 Content-Type: text/plain X-OriginatorOrg: freescale.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Macros for checking FSL PCI controller version. Signed-off-by: Varun Sethi --- arch/powerpc/include/asm/pci-bridge.h | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index 025a130..c12ed78 100644 --- a/arch/powerpc/include/asm/pci-bridge.h +++ b/arch/powerpc/include/asm/pci-bridge.h @@ -14,6 +14,10 @@ struct device_node; +/* FSL PCI controller BRR1 register */ +#define PCI_FSL_BRR1 0xbf8 +#define PCI_FSL_BRR1_VER 0xffff + /* * Structure of a PCI controller (host bridge) */ -- 1.7.4.1