From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936581Ab3DHWy0 (ORCPT ); Mon, 8 Apr 2013 18:54:26 -0400 Received: from mail.free-electrons.com ([94.23.35.102]:52085 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936446Ab3DHWw0 (ORCPT ); Mon, 8 Apr 2013 18:52:26 -0400 From: Gregory CLEMENT To: Jason Cooper , Andrew Lunn , Gregory Clement Cc: Grant Likely , Rob Herring , Thomas Petazzoni , Ezequiel Garcia , linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Olof Johansson , Nicolas Pitre , Lior Amsalem , Maen Suleiman , Tawfik Bayouk , Shadi Ammouri , Eran Ben-Avi , Yehuda Yitschak , Nadav Haklai , Ike Pan , Chris Van Hoof , Dan Frazier , Leif Lindholm , Jon Masters , David Marlin , Sebastian Hesselbarth Subject: [PATCH v3 3/9] ARM: mvebu: Align the internal registers virtual base to support LPAE Date: Tue, 9 Apr 2013 00:52:11 +0200 Message-Id: <1365461538-30702-4-git-send-email-gregory.clement@free-electrons.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1365461538-30702-1-git-send-email-gregory.clement@free-electrons.com> References: <1365461538-30702-1-git-send-email-gregory.clement@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Lior Amsalem In order to be able to support the LPAE, the internal registers virtual base must be aligned to 2MB. In LPAE section size is 2MB, in earlyprintk we map the internal registers and it must be section aligned. Signed-off-by: Lior Amsalem Signed-off-by: Gregory CLEMENT --- arch/arm/include/debug/mvebu.S | 2 +- arch/arm/mach-mvebu/armada-370-xp.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/debug/mvebu.S b/arch/arm/include/debug/mvebu.S index 865c6d0..df191af 100644 --- a/arch/arm/include/debug/mvebu.S +++ b/arch/arm/include/debug/mvebu.S @@ -12,7 +12,7 @@ */ #define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000 -#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000 +#define ARMADA_370_XP_REGS_VIRT_BASE 0xfec00000 .macro addruart, rp, rv, tmp ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE diff --git a/arch/arm/mach-mvebu/armada-370-xp.h b/arch/arm/mach-mvebu/armada-370-xp.h index c6a7d74..c49c08e 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.h +++ b/arch/arm/mach-mvebu/armada-370-xp.h @@ -16,7 +16,7 @@ #define __MACH_ARMADA_370_XP_H #define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000 -#define ARMADA_370_XP_REGS_VIRT_BASE IOMEM(0xfeb00000) +#define ARMADA_370_XP_REGS_VIRT_BASE IOMEM(0xfec00000) #define ARMADA_370_XP_REGS_SIZE SZ_1M #ifdef CONFIG_SMP -- 1.7.9.5