From: Huang Shijie <b32955@freescale.com>
To: <grant.likely@linaro.org>
Cc: <rob.herring@calxeda.com>, <arnd@arndb.de>,
<devicetree-discuss@lists.ozlabs.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <shawn.guo@linaro.org>,
Huang Shijie <b32955@freescale.com>
Subject: [PATCH 2/6] ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM
Date: Mon, 20 May 2013 16:48:58 +0800 [thread overview]
Message-ID: <1369039742-10893-3-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1369039742-10893-1-git-send-email-b32955@freescale.com>
In the imx6q-sabreauto and imx6dl-sabreauto boards,
the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but
it is used as a data pin for the WEIM NOR.
In order to fix the conflict, this patch removes the pin from the hog,
and adds a new pinctrl item: pinctrl_ecspi1_2.
The SPI NOR selects this pinctrl_ecspi1_2 when it is enabled.
Signed-off-by: Huang Shijie <b32955@freescale.com>
---
arch/arm/boot/dts/imx6dl-sabreauto.dts | 9 ++++++++-
arch/arm/boot/dts/imx6q-sabreauto.dts | 9 ++++++++-
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 +-
3 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-sabreauto.dts b/arch/arm/boot/dts/imx6dl-sabreauto.dts
index 60f3038..7695f70 100644
--- a/arch/arm/boot/dts/imx6dl-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6dl-sabreauto.dts
@@ -25,7 +25,14 @@
fsl,pins = <
MX6DL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
MX6DL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000
- MX6DL_PAD_EIM_D19__GPIO3_IO19 0x80000000
+ >;
+ };
+ };
+
+ ecspi1 {
+ pinctrl_ecspi1_2: ecspi1grp-2 {
+ fsl,pins = <
+ MX6DL_PAD_EIM_D19__GPIO3_IO19 0x80000000
>;
};
};
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
index 9fb3e99..67a3a6b 100644
--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -29,7 +29,14 @@
fsl,pins = <
MX6Q_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
MX6Q_PAD_SD2_DAT2__GPIO1_IO13 0x80000000
- MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000
+ >;
+ };
+ };
+
+ ecspi1 {
+ pinctrl_ecspi1_2: ecspi1grp-2 {
+ fsl,pins = <
+ MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000
>;
};
};
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index d6baa51..eb293f5 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -20,7 +20,7 @@
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1_1>;
+ pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_2>;
status = "disabled"; /* pin conflict with WEIM NOR */
flash: m25p80@0 {
--
1.7.1
next prev parent reply other threads:[~2013-05-20 9:07 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-20 8:48 [PATCH 0/6] ARM: imx6q{dl}: add the WEIM driver Huang Shijie
2013-05-20 8:48 ` [PATCH 1/6] drivers: bus: add a new driver for WEIM Huang Shijie
2013-05-20 13:18 ` Sascha Hauer
2013-05-22 8:30 ` Huang Shijie
2013-05-21 5:43 ` Shawn Guo
2013-05-22 8:16 ` Huang Shijie
2013-05-22 12:59 ` Arnd Bergmann
2013-05-23 2:17 ` Huang Shijie
2013-05-20 8:48 ` Huang Shijie [this message]
2013-05-21 5:49 ` [PATCH 2/6] ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM Shawn Guo
2013-05-21 5:53 ` Huang Shijie
2013-05-20 8:48 ` [PATCH 3/6] ARM: dts: imx6qdl: add more information for WEIM Huang Shijie
2013-05-20 8:49 ` [PATCH 4/6] ARM: dts: imx6q: add pinctrl for WEIM NOR Huang Shijie
2013-05-20 8:49 ` [PATCH 5/6] ARM: dts: imx6ql: add a " Huang Shijie
2013-05-20 8:49 ` [PATCH 6/6] ARM: dts: imx6qdl: enable the " Huang Shijie
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1369039742-10893-3-git-send-email-b32955@freescale.com \
--to=b32955@freescale.com \
--cc=arnd@arndb.de \
--cc=devicetree-discuss@lists.ozlabs.org \
--cc=grant.likely@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=rob.herring@calxeda.com \
--cc=shawn.guo@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®