From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753380Ab3IWOab (ORCPT ); Mon, 23 Sep 2013 10:30:31 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:17174 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751947Ab3IWOa3 (ORCPT ); Mon, 23 Sep 2013 10:30:29 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 23 Sep 2013 07:26:55 -0700 From: Peter De Schrijver To: Peter De Schrijver CC: Mike Turquette , Stephen Warren , Prashant Gaikwad , Thierry Reding , Joseph Lo , Paul Walmsley , , , Subject: [PATCH v2 03/12] clk: tegra: Add TEGRA_PERIPH_NO_DIV flag Date: Mon, 23 Sep 2013 17:24:55 +0300 Message-ID: <1379946381-20125-4-git-send-email-pdeschrijver@nvidia.com> X-Mailer: git-send-email 1.7.7.rc0.72.g4b5ea.dirty In-Reply-To: <1379946381-20125-1-git-send-email-pdeschrijver@nvidia.com> References: <1379946381-20125-1-git-send-email-pdeschrijver@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This flag indicates the peripheral clock does not have a divider. It will simply the initialization tables and avoids some very similar code. Signed-off-by: Peter De Schrijver --- drivers/clk/tegra/clk-periph.c | 8 +++++--- drivers/clk/tegra/clk.h | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c index 55ab4b1..becbeee 100644 --- a/drivers/clk/tegra/clk-periph.c +++ b/drivers/clk/tegra/clk-periph.c @@ -173,11 +173,12 @@ const struct clk_ops tegra_clk_periph_nodiv_ops = { static struct clk *_tegra_clk_register_periph(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, - void __iomem *clk_base, u32 offset, bool div, + void __iomem *clk_base, u32 offset, unsigned long flags) { struct clk *clk; struct clk_init_data init; + bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV); init.name = name; init.ops = div ? &tegra_clk_periph_ops : &tegra_clk_periph_nodiv_ops; @@ -210,7 +211,7 @@ struct clk *tegra_clk_register_periph(const char *name, u32 offset, unsigned long flags) { return _tegra_clk_register_periph(name, parent_names, num_parents, - periph, clk_base, offset, true, flags); + periph, clk_base, offset, flags); } struct clk *tegra_clk_register_periph_nodiv(const char *name, @@ -218,6 +219,7 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset) { + periph->gate.flags |= TEGRA_PERIPH_NO_DIV; return _tegra_clk_register_periph(name, parent_names, num_parents, - periph, clk_base, offset, false, CLK_SET_RATE_PARENT); + periph, clk_base, offset, CLK_SET_RATE_PARENT); } diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 4fdaef4..7ddd407 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -397,6 +397,7 @@ struct tegra_clk_periph_gate { #define TEGRA_PERIPH_MANUAL_RESET BIT(1) #define TEGRA_PERIPH_ON_APB BIT(2) #define TEGRA_PERIPH_WAR_1005168 BIT(3) +#define TEGRA_PERIPH_NO_DIV BIT(4) void tegra_periph_reset(struct tegra_clk_periph_gate *gate, bool assert); extern const struct clk_ops tegra_clk_periph_gate_ops; -- 1.7.7.rc0.72.g4b5ea.dirty