From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755570Ab3JHKIf (ORCPT ); Tue, 8 Oct 2013 06:08:35 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:55000 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752704Ab3JHKHQ (ORCPT ); Tue, 8 Oct 2013 06:07:16 -0400 From: Roger Quadros To: , CC: , , , , , , Roger Quadros Subject: [PATCH v2 4/6] ARM: dts: omap5-uevm: Provide USB PHY clock Date: Tue, 8 Oct 2013 13:06:37 +0300 Message-ID: <1381226799-29158-5-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1381226799-29158-1-git-send-email-rogerq@ti.com> References: <1381226799-29158-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The HS USB 2 PHY gets its clock from AUXCLK1. Provide this information. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/omap5-uevm.dts | 8 ++------ 1 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 748f6bf..6a0d73c 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -31,12 +31,8 @@ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */ - /** - * FIXME - * Put the right clock phandle here when available - * clocks = <&auxclk1>; - * clock-names = "main_clk"; - */ + clocks = <&auxclk1_ck>; + clock-names = "main_clk"; clock-frequency = <19200000>; }; -- 1.7.4.1