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From: Suman Anna <s-anna@ti.com>
To: Ohad Ben-Cohen <ohad@wizery.com>, Mark Rutland <mark.rutland@arm.com>
Cc: Tony Lindgren <tony@atomide.com>,
	Benoit Cousson <bcousson@baylibre.com>,
	Kumar Gala <galak@codeaurora.org>, Paul Walmsley <paul@pwsan.com>,
	<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>,
	<devicetree@vger.kernel.org>, Suman Anna <s-anna@ti.com>
Subject: [PATCHv3 4/8] hwspinlock/omap: enable module before reading SYSSTATUS register
Date: Thu, 10 Oct 2013 16:15:31 -0500	[thread overview]
Message-ID: <1381439735-52888-5-git-send-email-s-anna@ti.com> (raw)
In-Reply-To: <1381439735-52888-1-git-send-email-s-anna@ti.com>

The number of hwspinlocks are determined based on the value read
from the IP block's SYSSTATUS register. However, the module may
not be enabled and clocked, and the read may result in a bus error.

This particular issue is seen rather easily on AM33XX, since the
module wakeup is software controlled, and it is disabled out of
reset. Make sure the module is enabled and clocked before reading
the SYSSTATUS register.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 drivers/hwspinlock/omap_hwspinlock.c | 21 ++++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/hwspinlock/omap_hwspinlock.c b/drivers/hwspinlock/omap_hwspinlock.c
index 349c5aa..9495d76 100644
--- a/drivers/hwspinlock/omap_hwspinlock.c
+++ b/drivers/hwspinlock/omap_hwspinlock.c
@@ -100,10 +100,23 @@ static int omap_hwspinlock_probe(struct platform_device *pdev)
 	if (!io_base)
 		return -ENOMEM;
 
+	/*
+	 * make sure the module is enabled and clocked before reading
+	 * the module SYSSTATUS register
+	 */
+	pm_runtime_enable(&pdev->dev);
+	pm_runtime_get_sync(&pdev->dev);
+
 	/* Determine number of locks */
 	i = readl(io_base + SYSSTATUS_OFFSET);
 	i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
 
+	/*
+	 * runtime PM will make sure the clock of this module is
+	 * enabled again iff at least one lock is requested
+	 */
+	pm_runtime_put(&pdev->dev);
+
 	/* one of the four lsb's must be set, and nothing else */
 	if (hweight_long(i & 0xf) != 1 || i > 8) {
 		ret = -EINVAL;
@@ -123,12 +136,6 @@ static int omap_hwspinlock_probe(struct platform_device *pdev)
 	for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
 		hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
 
-	/*
-	 * runtime PM will make sure the clock of this module is
-	 * enabled iff at least one lock is requested
-	 */
-	pm_runtime_enable(&pdev->dev);
-
 	ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
 						base_id, num_locks);
 	if (ret)
@@ -137,9 +144,9 @@ static int omap_hwspinlock_probe(struct platform_device *pdev)
 	return 0;
 
 reg_fail:
-	pm_runtime_disable(&pdev->dev);
 	kfree(bank);
 iounmap_base:
+	pm_runtime_disable(&pdev->dev);
 	iounmap(io_base);
 	return ret;
 }
-- 
1.8.4


  parent reply	other threads:[~2013-10-10 21:16 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-10 21:15 [PATCHv3 0/8] omap hwspinlock dt support Suman Anna
2013-10-10 21:15 ` [PATCHv3 1/8] hwspinlock/core: maintain a list of registered hwspinlock banks Suman Anna
2013-10-10 21:15 ` [PATCHv3 2/8] hwspinlock/core: add common dt bindings and OF helpers Suman Anna
2013-10-10 21:15 ` [PATCHv3 3/8] hwspinlock/omap: add support for dt nodes Suman Anna
2013-10-10 21:15 ` Suman Anna [this message]
2013-10-10 21:15 ` [PATCHv3 5/8] hwspinlock/omap: support AM33xx Suman Anna
2013-10-10 21:15 ` [PATCHv3 6/8] ARM: dts: OMAP4: Add hwspinlock node Suman Anna
2013-10-11 23:41   ` Tony Lindgren
2013-10-29 20:59     ` Tony Lindgren
2013-10-10 21:15 ` [PATCHv3 7/8] ARM: dts: OMAP5: " Suman Anna
2013-10-10 21:15 ` [PATCHv3 8/8] ARM: dts: AM33XX: " Suman Anna
2013-11-12 18:16 ` [PATCHv3 0/8] omap hwspinlock dt support Anna, Suman
2013-11-13  9:36   ` Mark Rutland

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