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From: Sricharan R <r.sricharan@ti.com>
To: <r.sricharan@ti.com>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-doc@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-omap@vger.kernel.org>, <linus.walleij@linaro.org>,
	<linux@arm.linux.org.uk>, <tony@atomide.com>, <rnayak@ti.com>,
	<marc.zyngier@arm.com>, <grant.likely@linaro.org>,
	<mark.rutland@arm.com>, <robherring2@gmail.com>,
	<tglx@linutronix.de>, <galak@codeaurora.org>,
	<rob.herring@calxeda.com>, <nm@ti.com>, <bcousson@baylibre.com>
Subject: [PATCH V4 3/4] ARM: OMAP4+: Correct Wakeup-gen code to use physical irq number
Date: Thu, 14 Nov 2013 17:48:49 +0530	[thread overview]
Message-ID: <1384431530-2166-4-git-send-email-r.sricharan@ti.com> (raw)
In-Reply-To: <1384431530-2166-1-git-send-email-r.sricharan@ti.com>

The wakeup gen mask/unmask callback uses the irq element of the
irq_data to setup. The irq is the linux virtual irq number and
is same as the hardware irq number only when the parent irqchip
is setup as a legacy domain. When it is used as a linear domain,
the virtual irqs are allocated dynamically and wakeup gen code
cannot rely on these numbers to access the irq registers. Instead
use the hwirq element of the irq_data which represent the physical
irq number.

Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
 arch/arm/mach-omap2/omap-wakeupgen.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 3664562..693fe48 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -138,7 +138,7 @@ static void wakeupgen_mask(struct irq_data *d)
 	unsigned long flags;
 
 	raw_spin_lock_irqsave(&wakeupgen_lock, flags);
-	_wakeupgen_clear(d->irq, irq_target_cpu[d->irq]);
+	_wakeupgen_clear(d->hwirq, irq_target_cpu[d->hwirq]);
 	raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
 }
 
@@ -150,7 +150,7 @@ static void wakeupgen_unmask(struct irq_data *d)
 	unsigned long flags;
 
 	raw_spin_lock_irqsave(&wakeupgen_lock, flags);
-	_wakeupgen_set(d->irq, irq_target_cpu[d->irq]);
+	_wakeupgen_set(d->hwirq, irq_target_cpu[d->hwirq]);
 	raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
 }
 
-- 
1.7.9.5


  parent reply	other threads:[~2013-11-14 12:19 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-14 12:18 [PATCH V4 0/4] DRIVERS: IRQCHIP: Add support for crossbar IP Sricharan R
2013-11-14 12:18 ` [PATCH V4 1/4] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs Sricharan R
2013-11-14 12:33   ` Thomas Gleixner
2013-11-14 12:34     ` Sricharan R
2013-11-14 14:01   ` Mark Rutland
2013-11-14 16:46     ` Sricharan R
2013-11-15 11:23       ` Mark Rutland
2013-11-15 15:01         ` Santosh Shilimkar
2013-12-02 10:26         ` Sricharan R
2013-11-14 12:18 ` [PATCH V4 2/4] DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP Sricharan R
2013-11-14 14:12   ` Mark Rutland
2013-11-14 16:41     ` Sricharan R
2013-11-15 11:07       ` Mark Rutland
2013-11-14 12:18 ` Sricharan R [this message]
2013-11-14 12:18 ` [PATCH V4 4/4] ARM: DRA: Enable Crossbar IP support for DRA7XX Sricharan R
2013-11-14 14:25 ` [PATCH V4 0/4] DRIVERS: IRQCHIP: Add support for crossbar IP Santosh Shilimkar
2013-11-19  8:37 ` Linus Walleij
2013-12-02  6:27   ` Sricharan R

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