From: Michael Chan <mchan@broadcom.com>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: Natarajan Gurumoorthy <natg@google.com>, <nsujir@broadcom.com>,
<netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] net-tg3: Initialize REG_BASE_ADDR at PCI config offset 120 to 0
Date: Mon, 9 Dec 2013 22:58:44 -0800 [thread overview]
Message-ID: <1386658724.1752.19.camel@LTIRV-MCHAN1.corp.ad.broadcom.com> (raw)
In-Reply-To: <1386623253.1752.6.camel@LTIRV-MCHAN1.corp.ad.broadcom.com>
On Mon, 2013-12-09 at 13:07 -0800, Michael Chan wrote:
> On Tue, 2013-12-10 at 00:18 +0300, Sergei Shtylyov wrote:
> > > We had crashes when the PCI config space got scanned via
> > > /sys/devices/pcixxxx/....../config.
> >
> > > I agree that this fix will not help if the scan happens before the tg3
> > > driver gets loaded.
> >
> > Then perhaps a better place for such fixup would be a PCI quirk?
> >
> Yes, I agree. Thanks.
>
On second thought, I think your original patch should be sufficient and
we don't need to add the PCI quirk to cover so many devices. The reason
is that indirect access needs to be explicitly enabled in the
MISC_HOST_CTRL (0x68) register. The default value for register 0x68
should have indirect access disabled.
Nat, does this match what you're seeing? Did you ever see any system
crash before tg3 loads?
next prev parent reply other threads:[~2013-12-10 6:58 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-09 18:43 Nat Gurumoorthy
2013-12-09 19:00 ` Michael Chan
2013-12-09 19:22 ` Natarajan Gurumoorthy
2013-12-09 21:18 ` Sergei Shtylyov
2013-12-09 21:07 ` Michael Chan
2013-12-10 6:58 ` Michael Chan [this message]
2013-12-10 15:01 ` Natarajan Gurumoorthy
2013-12-10 18:40 ` Michael Chan
2013-12-10 18:43 ` David Miller
2013-12-10 18:49 ` Michael Chan
2013-12-11 3:23 ` David Miller
2013-12-11 23:21 ` Michael Chan
2013-12-12 0:35 ` David Miller
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