From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754118Ab3LODqA (ORCPT ); Sat, 14 Dec 2013 22:46:00 -0500 Received: from mail-pb0-f43.google.com ([209.85.160.43]:57686 "EHLO mail-pb0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753596Ab3LODp6 (ORCPT ); Sat, 14 Dec 2013 22:45:58 -0500 From: Luming Yu To: linux-kernel@vger.kernel.org Cc: Luming Yu Subject: [PATCH 2/2] Add RTM C intrinsics head file For new instruction Date: Sun, 15 Dec 2013 11:45:48 +0800 Message-Id: <1387079148-4236-1-git-send-email-luming.yu@gmail.com> X-Mailer: git-send-email 1.8.1.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org XBEGIN, XEND, XABORT, XTEST to enable kernel to explore the value of Restricted Transactional Memory that can be found on your haswell laptop and following up offerings see Chapter 12.3.3 Using HLE or RTM for lock Elision of 64-ia-32-architectures-optimization-manual.pdf July 2013 Tested-by: Luming Yu Signed-off-by: Luming Yu Signed-off-by: Andi Kleen > 24) & 0xff) + +#define __rtm_force_inline __attribute__((__always_inline__)) inline + +static __rtm_force_inline int _xbegin(void) +{ + int ret = _XBEGIN_STARTED; + asm volatile(".byte 0xc7,0xf8 ; .long 0" : "+a" (ret) :: "memory"); + return ret; +} + +static __rtm_force_inline void _xend(void) +{ + asm volatile(".byte 0x0f,0x01,0xd5" ::: "memory"); +} + +static __rtm_force_inline void _xabort(const unsigned int status) +{ + asm volatile(".byte 0xc6,0xf8,%P0" :: "i" (status) : "memory"); +} + +static __rtm_force_inline int _xtest(void) +{ + unsigned char out; + asm volatile(".byte 0x0f,0x01,0xd6 ; setnz %0" : "=r" (out) :: "memory"); + return out; +} + +#endif -- 1.8.1.4