From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755611Ab3L3KTr (ORCPT ); Mon, 30 Dec 2013 05:19:47 -0500 Received: from mail-we0-f180.google.com ([74.125.82.180]:51361 "EHLO mail-we0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755559Ab3L3KTp (ORCPT ); Mon, 30 Dec 2013 05:19:45 -0500 From: Daniel Lezcano To: mingo@kernel.org, tglx@linutronix.de Cc: axel.lin@ingics.com, ezequiel.garcia@free-electrons.com, jg1.han@samsung.com, laurent.pinchart+renesas@ideasonboard.com, linus.walleij@linaro.org, maxime.ripard@free-electrons.com, michael.opdenacker@free-electrons.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 02/20] clocksource: sun4i: Change CPU mask to cpu_possible_mask Date: Mon, 30 Dec 2013 11:19:21 +0100 Message-Id: <1388398779-11222-2-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1388398779-11222-1-git-send-email-daniel.lezcano@linaro.org> References: <52C1479E.80808@linaro.org> <1388398779-11222-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Maxime Ripard The interrupt for the timer is a shared processor interrupt, so any CPU found in the system can handle it. Switch to our cpumask to cpu_possible_mask instead of cpumask_of(0). Signed-off-by: Maxime Ripard Signed-off-by: Daniel Lezcano Reviewed-by: Stephen Boyd --- drivers/clocksource/sun4i_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clocksource/sun4i_timer.c b/drivers/clocksource/sun4i_timer.c index a7f492e..6a76b4e 100644 --- a/drivers/clocksource/sun4i_timer.c +++ b/drivers/clocksource/sun4i_timer.c @@ -187,7 +187,7 @@ static void __init sun4i_timer_init(struct device_node *node) val = readl(timer_base + TIMER_IRQ_EN_REG); writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG); - sun4i_clockevent.cpumask = cpumask_of(0); + sun4i_clockevent.cpumask = cpu_possible_mask; sun4i_clockevent.irq = irq; clockevents_config_and_register(&sun4i_clockevent, rate, -- 1.7.9.5