From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756853AbaAHN4v (ORCPT ); Wed, 8 Jan 2014 08:56:51 -0500 Received: from mail-wi0-f171.google.com ([209.85.212.171]:54634 "EHLO mail-wi0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932266AbaAHNsv (ORCPT ); Wed, 8 Jan 2014 08:48:51 -0500 From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: computersforpeace@gmail.com, angus.clark@st.com, Lee Jones Subject: [PATCH v4 17/37] mtd: st_spi_fsm: Provide the sequence for enabling 32bit addressing mode Date: Wed, 8 Jan 2014 13:47:00 +0000 Message-Id: <1389188840-14306-18-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1389188840-14306-1-git-send-email-lee.jones@linaro.org> References: <1389188840-14306-1-git-send-email-lee.jones@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The FSM Serial Flash Controller is driven by issuing a standard set of register writes we call a message sequence. This patch supplies a method to prepare the message sequence responsible for setting 32bit addressing mode on the Flash chip. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 5ee6d08..02718ae 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -447,6 +447,28 @@ static struct stfsm_seq stfsm_seq_erase_sector = { SEQ_CFG_STARTSEQ), }; +static int stfsm_n25q_en_32bit_addr_seq(struct stfsm_seq *seq) +{ + seq->seq_opc[0] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) | + SEQ_OPC_OPCODE(FLASH_CMD_EN4B_ADDR)); + seq->seq_opc[1] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) | + SEQ_OPC_OPCODE(FLASH_CMD_WREN) | + SEQ_OPC_CSDEASSERT); + + seq->seq[0] = STFSM_INST_CMD2; + seq->seq[1] = STFSM_INST_CMD1; + seq->seq[2] = STFSM_INST_WAIT; + seq->seq[3] = STFSM_INST_STOP; + + seq->seq_cfg = (SEQ_CFG_PADS_1 | + SEQ_CFG_ERASE | + SEQ_CFG_READNOTWRITE | + SEQ_CFG_CSDEASSERT | + SEQ_CFG_STARTSEQ); + + return 0; +} + static inline int stfsm_is_idle(struct stfsm *fsm) { return readl(fsm->base + SPI_FAST_SEQ_STA) & 0x10; -- 1.8.3.2