From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753182AbaAJHCm (ORCPT ); Fri, 10 Jan 2014 02:02:42 -0500 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:34871 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751569AbaAJHAY (ORCPT ); Fri, 10 Jan 2014 02:00:24 -0500 From: Chen-Yu Tsai To: Srinivas Kandagatla , Giuseppe Cavallaro , Maxime Ripard Cc: Chen-Yu Tsai , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, Rob Herring , Emilio Lopez , Mike Turquette Subject: [PATCH v2 10/16] ARM: dts: sun7i: Add GMAC clock node to sun7i DTSI Date: Fri, 10 Jan 2014 15:00:11 +0800 Message-Id: <1389337217-29032-11-git-send-email-wens@csie.org> X-Mailer: git-send-email 1.8.5.2 In-Reply-To: <1389337217-29032-1-git-send-email-wens@csie.org> References: <1389337217-29032-1-git-send-email-wens@csie.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The GMAC uses 1 of 2 sources for its transmit clock, depending on the PHY interface mode. Add both sources as dummy clocks, and as parents to the GMAC clock node. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun7i-a20.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 2a78de4..4019c55 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -308,6 +308,34 @@ }; /* + * The following two are dummy clocks, placeholders used + * on gmac_tx clock. The actual frequency and availability + * depends on the external PHY, operation mode and link + * speed. + */ + mii_phy_tx_clk: clk@2 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "mii_phy_tx"; + }; + + gmac_int_tx_clk: clk@3 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac_int_tx"; + }; + + gmac_tx_clk: clk@01c20164 { + #clock-cells = <0>; + compatible = "allwinner,sun7i-a20-gmac-clk"; + reg = <0x01c20164 0x4>; + clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>; + clock-output-names = "gmac_tx"; + }; + + /* * Dummy clock used by output clocks */ osc24M_32k: clk@1 { -- 1.8.5.2