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From: Lucas Stach <dev@lynxeye.de>
To: Alexandre Courbot <acourbot@nvidia.com>
Cc: Ben Skeggs <bskeggs@redhat.com>,
	nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	gnurou@gmail.com, Eric Brower <ebrower@nvidia.com>,
	Stephen Warren <swarren@wwwdotorg.org>,
	linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
	Terje Bergstrom <tbergstrom@nvidia.com>,
	Ken Adams <KAdams@nvidia.com>
Subject: Re: [RFC 14/16] drm/nouveau/fb: add GK20A support
Date: Sat, 01 Feb 2014 14:40:57 +0100	[thread overview]
Message-ID: <1391262057.2035.7.camel@antimon.intern.lynxeye.de> (raw)
In-Reply-To: <1391224618-3794-15-git-send-email-acourbot@nvidia.com>

Am Samstag, den 01.02.2014, 12:16 +0900 schrieb Alexandre Courbot:
> Add a clumsy-but-working FB support for GK20A. This chip only uses system
> memory, so we allocate a big chunk using CMA and let the existing memory
> managers work on it.
> 
> A better future design would be to allocate objects directly from system
> memory without having to suffer from the limitations of a large,
> contiguous pool.
> 
I don't know if Tegra124 is similar to 114 in this regard [hint: get the
TRM out :)], but if you go for a dedicated VRAM allocator, wouldn't it
make sense to take a chunk of the MMIO overlaid memory for this when
possible, rather than carving this out of CPU accessible mem?

> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
>  drivers/gpu/drm/nouveau/Makefile                 |  2 +
>  drivers/gpu/drm/nouveau/core/include/subdev/fb.h |  1 +
>  drivers/gpu/drm/nouveau/core/subdev/fb/nvea.c    | 28 ++++++++++
>  drivers/gpu/drm/nouveau/core/subdev/fb/priv.h    |  1 +
>  drivers/gpu/drm/nouveau/core/subdev/fb/ramnvea.c | 67 ++++++++++++++++++++++++
>  5 files changed, 99 insertions(+)
>  create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/nvea.c
>  create mode 100644 drivers/gpu/drm/nouveau/core/subdev/fb/ramnvea.c
> 
> diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
> index 3548fcd..d9fe3e6 100644
> --- a/drivers/gpu/drm/nouveau/Makefile
> +++ b/drivers/gpu/drm/nouveau/Makefile
> @@ -100,6 +100,7 @@ nouveau-y += core/subdev/fb/nvaa.o
>  nouveau-y += core/subdev/fb/nvaf.o
>  nouveau-y += core/subdev/fb/nvc0.o
>  nouveau-y += core/subdev/fb/nve0.o
> +nouveau-y += core/subdev/fb/nvea.o
>  nouveau-y += core/subdev/fb/ramnv04.o
>  nouveau-y += core/subdev/fb/ramnv10.o
>  nouveau-y += core/subdev/fb/ramnv1a.o
> @@ -114,6 +115,7 @@ nouveau-y += core/subdev/fb/ramnva3.o
>  nouveau-y += core/subdev/fb/ramnvaa.o
>  nouveau-y += core/subdev/fb/ramnvc0.o
>  nouveau-y += core/subdev/fb/ramnve0.o
> +nouveau-y += core/subdev/fb/ramnvea.o
>  nouveau-y += core/subdev/fb/sddr3.o
>  nouveau-y += core/subdev/fb/gddr5.o
>  nouveau-y += core/subdev/gpio/base.o
> diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/fb.h b/drivers/gpu/drm/nouveau/core/include/subdev/fb.h
> index d7ecafb..3905816 100644
> --- a/drivers/gpu/drm/nouveau/core/include/subdev/fb.h
> +++ b/drivers/gpu/drm/nouveau/core/include/subdev/fb.h
> @@ -105,6 +105,7 @@ extern struct nouveau_oclass *nvaa_fb_oclass;
>  extern struct nouveau_oclass *nvaf_fb_oclass;
>  extern struct nouveau_oclass *nvc0_fb_oclass;
>  extern struct nouveau_oclass *nve0_fb_oclass;
> +extern struct nouveau_oclass *nvea_fb_oclass;
>  
>  #include <subdev/bios/ramcfg.h>
>  
> diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nvea.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nvea.c
> new file mode 100644
> index 0000000..5ff6029
> --- /dev/null
> +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nvea.c
> @@ -0,0 +1,28 @@
> +/*
> + * Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + */
> +
> +#include "nvc0.h"
> +
> +struct nouveau_oclass *
> +nvea_fb_oclass = &(struct nouveau_fb_impl) {
> +	.base.handle = NV_SUBDEV(FB, 0xea),
> +	.base.ofuncs = &(struct nouveau_ofuncs) {
> +		.ctor = nvc0_fb_ctor,
> +		.dtor = nvc0_fb_dtor,
> +		.init = nvc0_fb_init,
> +		.fini = _nouveau_fb_fini,
> +	},
> +	.memtype = nvc0_fb_memtype_valid,
> +	.ram = &nvea_ram_oclass,
> +}.base;
> diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/priv.h b/drivers/gpu/drm/nouveau/core/subdev/fb/priv.h
> index edaf95d..0b95a25 100644
> --- a/drivers/gpu/drm/nouveau/core/subdev/fb/priv.h
> +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/priv.h
> @@ -32,6 +32,7 @@ extern struct nouveau_oclass nva3_ram_oclass;
>  extern struct nouveau_oclass nvaa_ram_oclass;
>  extern struct nouveau_oclass nvc0_ram_oclass;
>  extern struct nouveau_oclass nve0_ram_oclass;
> +extern struct nouveau_oclass nvea_ram_oclass;
>  
>  int nouveau_sddr3_calc(struct nouveau_ram *ram);
>  int nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts);
> diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnvea.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnvea.c
> new file mode 100644
> index 0000000..3038e08
> --- /dev/null
> +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnvea.c
> @@ -0,0 +1,67 @@
> +/*
> + * Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + */
> +
> +/*
> + * TODO replace this CMA-requiring horror with a proper allocator for GPU
> + * objects in main memory. But for the moment it does the job and can reuse some
> + * of the nvc0 functions.
> + */
> +
> +#include "nvc0.h"
> +
> +#include <linux/dma-mapping.h>
> +
> +static int
> +nvea_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
> +	      struct nouveau_oclass *oclass, void *data, u32 datasize,
> +	      struct nouveau_object **pobject)
> +{
> +	struct nouveau_fb *pfb = nouveau_fb(parent);
> +	struct nouveau_ram *ram;
> +	void *vram;
> +	dma_addr_t dma_handle;
> +	int ret;
> +
> +	ret = nouveau_ram_create(parent, engine, oclass, &ram);
> +	*pobject = nv_object(ram);
> +	if (ret)
> +		return ret;
> +
> +	ram->type   = NV_MEM_TYPE_STOLEN;
> +	/* Use a fixed size of 64MB for now */
> +	ram->size = 0x4000000;
> +	ram->stolen = (u64)0x00000000;
> +	vram = dma_alloc_coherent(nv_device_base(nv_device(parent)), ram->size,
> +				  &dma_handle, GFP_KERNEL);
> +	if (!vram)
> +		return -ENOMEM;
> +
> +	ret = nouveau_mm_init(&pfb->vram, dma_handle >> 12, ram->size >> 12, 1);
> +	if (ret)
> +		return ret;
> +
> +	ram->get = nvc0_ram_get;
> +	ram->put = nvc0_ram_put;
> +	return 0;
> +}
> +
> +struct nouveau_oclass
> +nvea_ram_oclass = {
> +	.ofuncs = &(struct nouveau_ofuncs) {
> +		.ctor = nvea_ram_ctor,
> +		.dtor = _nouveau_ram_dtor,
> +		.init = _nouveau_ram_init,
> +		.fini = _nouveau_ram_fini,
> +	},
> +};



  reply	other threads:[~2014-02-01 23:04 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-01  3:16 [RFC 00/16] drm/nouveau: initial support for GK20A (Tegra K1) Alexandre Courbot
2014-02-01  3:16 ` [RFC 01/16] drm/nouveau: handle -EACCES runtime PM return code Alexandre Courbot
2014-02-01  3:16 ` [RFC 02/16] drm/nouveau: basic support for platform devices Alexandre Courbot
2014-02-01  3:16 ` [RFC 03/16] drm/nouveau: add platform device probing function Alexandre Courbot
2014-02-01  3:16 ` [RFC 04/16] drm/nouveau/fifo: support platform devices Alexandre Courbot
2014-02-01  3:16 ` [RFC 05/16] drm/nouveau/bar: " Alexandre Courbot
2014-02-01  3:16 ` [RFC 06/16] drm/nouveau/bar: only ioremap BAR3 if it exists Alexandre Courbot
2014-02-01  3:16 ` [RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3 Alexandre Courbot
2014-02-04  3:54   ` Ben Skeggs
2014-02-04  8:31     ` Alexandre Courbot
2014-02-01  3:16 ` [RFC 08/16] drm/nouveau/mc: support platform devices Alexandre Courbot
2014-02-01  3:16 ` [RFC 09/16] drm/nouveau/fb: " Alexandre Courbot
2014-02-01  3:16 ` [RFC 10/16] drm/nouveau/timer: skip calibration on GK20A Alexandre Courbot
2014-02-04  3:55   ` Ben Skeggs
2014-02-04  8:39     ` Alexandre Courbot
2014-02-05 20:27       ` Stephen Warren
2014-02-01  3:16 ` [RFC 11/16] drm/nouveau/fifo: allocate usermem as needed Alexandre Courbot
2014-02-01  3:16 ` [RFC 12/16] drm/nouveau/fifo: add GK20A support Alexandre Courbot
2014-02-04  9:15   ` Daniel Vetter
2014-02-05  1:21     ` Alexandre Courbot
2014-02-01  3:16 ` [RFC 13/16] drm/nouveau/ibus: " Alexandre Courbot
2014-02-02  6:35   ` Ilia Mirkin
2014-02-02  9:38     ` Alexandre Courbot
2014-02-01  3:16 ` [RFC 14/16] drm/nouveau/fb: " Alexandre Courbot
2014-02-01 13:40   ` Lucas Stach [this message]
2014-02-01 23:28     ` Ilia Mirkin
2014-02-01 23:58       ` Lucas Stach
2014-02-02 13:43         ` Alexandre Courbot
2014-02-07 14:19           ` Alexandre Courbot
2014-02-01  3:16 ` [RFC 15/16] drm/nouveau: support GK20A in nouveau_accel_init() Alexandre Courbot
2014-02-01  3:16 ` [RFC 16/16] drm/nouveau: support for probing GK20A Alexandre Courbot
2014-02-02 19:10 ` [RFC 00/16] drm/nouveau: initial support for GK20A (Tegra K1) Ilia Mirkin
2014-02-03  2:44   ` Alexandre Courbot
2014-02-03  3:14     ` Ilia Mirkin
2014-02-03  3:41       ` Ben Skeggs
2014-02-03 11:25 ` David Herrmann
2014-02-04  2:47   ` Alexandre Courbot
2014-02-03 17:33 ` Daniel Vetter
2014-02-04  3:53 ` Ben Skeggs
2014-02-04  8:44   ` Alexandre Courbot

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