From: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
To: linux-kernel@vger.kernel.org
Cc: mingo@kernel.org, laijs@cn.fujitsu.com, dipankar@in.ibm.com,
akpm@linux-foundation.org, mathieu.desnoyers@efficios.com,
josh@joshtriplett.org, niv@us.ibm.com, tglx@linutronix.de,
peterz@infradead.org, rostedt@goodmis.org, dhowells@redhat.com,
edumazet@google.com, darren@dvhart.com, fweisbec@gmail.com,
oleg@redhat.com, sbw@mit.edu,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Subject: [PATCH tip/core/rcu 2/6] Documentation/memory-barriers.txt: ACCESS_ONCE() provides cache coherence
Date: Mon, 17 Feb 2014 13:26:49 -0800 [thread overview]
Message-ID: <1392672413-5114-2-git-send-email-paulmck@linux.vnet.ibm.com> (raw)
In-Reply-To: <1392672413-5114-1-git-send-email-paulmck@linux.vnet.ibm.com>
From: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
The ACCESS_ONCE() primitive provides cache coherence, but the
documentation does not clearly state this. This commit therefore upgrades
the documentation.
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
---
Documentation/memory-barriers.txt | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index 102dc19c4119..ad6db1d48f1f 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -1249,6 +1249,23 @@ The ACCESS_ONCE() function can prevent any number of optimizations that,
while perfectly safe in single-threaded code, can be fatal in concurrent
code. Here are some examples of these sorts of optimizations:
+ (*) The compiler is within its rights to reorder loads and stores
+ to the same variable, and in some cases, the CPU is within its
+ rights to reorder loads to the same variable. This means that
+ the following code:
+
+ a[0] = x;
+ a[1] = x;
+
+ Might result in an older value of x stored in a[1] than in a[0].
+ Prevent both the compiler and the CPU from doing this as follows:
+
+ a[0] = ACCESS_ONCE(x);
+ a[1] = ACCESS_ONCE(x);
+
+ In short, ACCESS_ONCE() provides "cache coherence" for accesses from
+ multiple CPUs to a single variable.
+
(*) The compiler is within its rights to merge successive loads from
the same variable. Such merging can cause the compiler to "optimize"
the following code:
--
1.8.1.5
next prev parent reply other threads:[~2014-02-17 21:27 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-17 21:26 [PATCH tip/core/rcu 0/6] Documentation changes for 3.15 Paul E. McKenney
2014-02-17 21:26 ` [PATCH tip/core/rcu 1/6] documentation: Document call_rcu() safety mechanisms and limitations Paul E. McKenney
2014-02-17 21:26 ` Paul E. McKenney [this message]
2014-02-17 21:40 ` [PATCH tip/core/rcu 2/6] Documentation/memory-barriers.txt: ACCESS_ONCE() provides cache coherence Josh Triplett
2014-02-17 22:52 ` Paul E. McKenney
2014-02-17 21:26 ` [PATCH tip/core/rcu 3/6] Documentation/memory-barriers.txt: Conditional must use prior load Paul E. McKenney
2014-02-17 21:26 ` [PATCH tip/core/rcu 4/6] Documentation/kernel-per-CPU-kthreads.txt: Workqueue affinity Paul E. McKenney
2014-02-17 21:26 ` [PATCH tip/core/rcu 5/6] Documentation/memory-barriers.txt: Need barriers() for some control dependencies Paul E. McKenney
2014-02-17 21:46 ` Josh Triplett
2014-02-17 22:58 ` Paul E. McKenney
2014-02-18 0:02 ` Josh Triplett
2014-02-18 0:17 ` Paul E. McKenney
2014-02-18 0:45 ` Josh Triplett
2014-02-18 1:21 ` Paul E. McKenney
2014-02-18 3:29 ` Josh Triplett
2014-02-18 4:57 ` Paul E. McKenney
2014-02-17 21:26 ` [PATCH tip/core/rcu 6/6] documentation: Fix some inconsistencies in RTFP.txt Paul E. McKenney
2014-02-17 21:39 ` [PATCH tip/core/rcu 1/6] documentation: Document call_rcu() safety mechanisms and limitations Josh Triplett
2014-02-17 22:52 ` Paul E. McKenney
2014-02-17 21:47 ` [PATCH tip/core/rcu 0/6] Documentation changes for 3.15 Josh Triplett
[not found] <1392672413-5114-2-git-send-email-paulmck () linux ! vnet ! ibm ! com>
2020-04-24 3:36 ` [PATCH tip/core/rcu 2/6] Documentation/memory-barriers.txt: ACCESS_ONCE() provides cache coherence Jon Masters
2020-04-27 22:59 ` Paul E. McKenney
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