From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759987AbaCTUj7 (ORCPT ); Thu, 20 Mar 2014 16:39:59 -0400 Received: from mail-ee0-f45.google.com ([74.125.83.45]:65109 "EHLO mail-ee0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759936AbaCTUjy (ORCPT ); Thu, 20 Mar 2014 16:39:54 -0400 From: Sebastian Hesselbarth To: Sebastian Hesselbarth Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Antoine Tenart , Alexandre Belloni , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] ARM: berlin: add scu and chipctrl device nodes for BG2/BG2Q Date: Thu, 20 Mar 2014 21:39:45 +0100 Message-Id: <1395347986-30203-2-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1395347986-30203-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1395347986-30203-1-git-send-email-sebastian.hesselbarth@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds scu and general purpose registers device nodes required for SMP on Berlin BG2 and BG2Q SoCs. The secondary CPUs will pick their jump address from general purpose (SW generic) register 1. Signed-off-by: Sebastian Hesselbarth --- Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Russell King Cc: Antoine Tenart Cc: Alexandre Belloni Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/berlin2.dtsi | 10 ++++++++++ arch/arm/boot/dts/berlin2q.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi index 56a1af2f1052..4d85312dc17a 100644 --- a/arch/arm/boot/dts/berlin2.dtsi +++ b/arch/arm/boot/dts/berlin2.dtsi @@ -72,6 +72,11 @@ cache-level = <2>; }; + scu: snoop-control-unit@ad0000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xad0000 0x58>; + }; + gic: interrupt-controller@ad1000 { compatible = "arm,cortex-a9-gic"; reg = <0xad1000 0x1000>, <0xad0100 0x0100>; @@ -176,6 +181,11 @@ }; }; + generic-regs@ea0184 { + compatible = "marvell,berlin-generic-regs", "syscon"; + reg = <0xea0184 0x10>; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 07452a7483fa..86d8a2c49f38 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -87,6 +87,11 @@ cache-level = <2>; }; + scu: snoop-control-unit@ad0000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xad0000 0x58>; + }; + local-timer@ad0600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; @@ -183,6 +188,11 @@ }; }; + generic-regs@ea0110 { + compatible = "marvell,berlin-generic-regs", "syscon"; + reg = <0xea0110 0x10>; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; -- 1.9.0