From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755369AbaCZN7t (ORCPT ); Wed, 26 Mar 2014 09:59:49 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:47617 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753545AbaCZN7p (ORCPT ); Wed, 26 Mar 2014 09:59:45 -0400 From: Kishon Vijay Abraham I To: , , , , , , , , CC: , , , , , , , , , , Subject: [RFC PATCH 10/12] ARM: dts: dra7: Add dt data for PCIe PHY Date: Wed, 26 Mar 2014 19:27:50 +0530 Message-ID: <1395842272-15267-11-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1395842272-15267-1-git-send-email-kishon@ti.com> References: <1395842272-15267-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Added dt data for PCIe PHY as a child node of ocp2scp3. The documention for this node can be found @ ../bindings/phy/ti-phy.txt. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra7.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 73c61d0..7ac372b 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -683,6 +683,22 @@ clock-names = "sysclk"; #phy-cells = <0>; }; + + pcie1_phy: pciephy@4a094000 { + compatible = "ti,phy-pipe3-pcie"; + ctrl-module = <&omap_control_pcie1phy>; + clocks = <&dpll_pcie_ref_ck>, + <&dpll_pcie_ref_m2ldo_ck>, + <&optfclk_pciephy_32khz>, + <&optfclk_pciephy_clk>, + <&optfclk_pciephy_div_clk>, + <&optfclk_pciephy_div>; + clock-names = "dpll_ref", "dpll_ref_m2", + "wkupclk", "refclk", + "div-clk", "phy-div"; + #phy-cells = <0>; + ti,hwmods = "pcie1-phy"; + }; }; sata: sata@4a141100 { -- 1.7.9.5