From: Philipp Zabel <p.zabel@pengutronix.de>
To: devel@driverdev.osuosl.org, Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
kernel@pengutronix.de, Philipp Zabel <p.zabel@pengutronix.de>
Subject: [PATCH 3/7] imx-drm: ipu-dmfc: Wait for FIFOs to run empty before disabling
Date: Mon, 14 Apr 2014 17:21:31 +0200 [thread overview]
Message-ID: <1397488895-17930-4-git-send-email-p.zabel@pengutronix.de> (raw)
In-Reply-To: <1397488895-17930-1-git-send-email-p.zabel@pengutronix.de>
Disabling the DMFC module while there is still data in the FIFOs could
cause the "new frame before end of frame" error state when the DMFC is
enabled again.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/staging/imx-drm/ipu-v3/ipu-dmfc.c | 25 +++++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-dmfc.c b/drivers/staging/imx-drm/ipu-v3/ipu-dmfc.c
index 4521301..59f182b 100644
--- a/drivers/staging/imx-drm/ipu-v3/ipu-dmfc.c
+++ b/drivers/staging/imx-drm/ipu-v3/ipu-dmfc.c
@@ -28,7 +28,12 @@
#define DMFC_GENERAL1 0x0014
#define DMFC_GENERAL2 0x0018
#define DMFC_IC_CTRL 0x001c
-#define DMFC_STAT 0x0020
+#define DMFC_WR_CHAN_ALT 0x0020
+#define DMFC_WR_CHAN_DEF_ALT 0x0024
+#define DMFC_DP_CHAN_ALT 0x0028
+#define DMFC_DP_CHAN_DEF_ALT 0x002c
+#define DMFC_GENERAL1_ALT 0x0030
+#define DMFC_STAT 0x0034
#define DMFC_WR_CHAN_1_28 0
#define DMFC_WR_CHAN_2_41 8
@@ -133,6 +138,20 @@ int ipu_dmfc_enable_channel(struct dmfc_channel *dmfc)
}
EXPORT_SYMBOL_GPL(ipu_dmfc_enable_channel);
+static void ipu_dmfc_wait_fifos(struct ipu_dmfc_priv *priv)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(1000);
+
+ while ((readl(priv->base + DMFC_STAT) & 0x02fff000) != 0x02fff000) {
+ if (time_after(jiffies, timeout)) {
+ dev_warn(priv->dev,
+ "Timeout waiting for DMFC FIFOs to clear\n");
+ break;
+ }
+ cpu_relax();
+ }
+}
+
void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc)
{
struct ipu_dmfc_priv *priv = dmfc->priv;
@@ -141,8 +160,10 @@ void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc)
priv->use_count--;
- if (!priv->use_count)
+ if (!priv->use_count) {
+ ipu_dmfc_wait_fifos(priv);
ipu_module_disable(priv->ipu, IPU_CONF_DMFC_EN);
+ }
if (priv->use_count < 0)
priv->use_count = 0;
--
1.9.1
next prev parent reply other threads:[~2014-04-14 15:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-14 15:21 [PATCH 0/7] Reorder i.MX IPU display enable/disable sequence Philipp Zabel
2014-04-14 15:21 ` [PATCH 1/7] imx-drm: ipu-common: add ipu_map_irq to request non-IDMAC interrupts Philipp Zabel
2014-04-14 15:21 ` [PATCH 2/7] imx-drm: ipu-common: Add helpers to check for a busy IDMAC channel and to busywait for an interrupt Philipp Zabel
2014-04-14 15:21 ` Philipp Zabel [this message]
2014-04-14 15:21 ` [PATCH 4/7] imx-drm: ipu-dc: Wait for DC_FC_1 / DP_SF_END interrupt Philipp Zabel
2014-04-14 21:45 ` Russell King - ARM Linux
2014-04-14 15:21 ` [PATCH 5/7] imx-drm: ipu-dp: Split disabling the DP foreground channel from disabling the DP module Philipp Zabel
2014-04-14 15:21 ` [PATCH 6/7] imx-drm: imx-dp: When disabling the DP foreground channel, wait until the DP background channel is finished before disabling the IDMAC channel Philipp Zabel
2014-04-14 15:21 ` [PATCH 7/7] imx-drm: ipuv3-crtc: Change display enable/disable order Philipp Zabel
2014-04-14 19:57 ` [PATCH 0/7] Reorder i.MX IPU display enable/disable sequence Russell King - ARM Linux
2014-04-14 21:31 ` Russell King - ARM Linux
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