mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Nishanth Menon <nm@ti.com>
To: Tony Lindgren <tony@atomide.com>,
	Santosh Shilimkar <santosh.shilimkar@ti.com>,
	Sricharan R <r.sricharan@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>, Rajendra Nayak <rnayak@ti.com>,
	Nishanth Menon <nm@ti.com>,
	Peter Ujfalusi <peter.ujfalusi@ti.com>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-omap@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH V2 10/19] bus: omap_l3_noc: use of_match_data to pick up SoC information
Date: Thu, 17 Apr 2014 15:49:26 -0500	[thread overview]
Message-ID: <1397767775-10965-11-git-send-email-nm@ti.com> (raw)
In-Reply-To: <1397767775-10965-1-git-send-email-nm@ti.com>

From: Sricharan R <r.sricharan@ti.com>

DRA7xx SoC has the same l3-noc interconnect ip (as OMAP4 and OMAP5), but
AM437x SoC has just 2 modules instead of 3 which other SoCs have.

So, stop using direct access of array indices and use of->match data and
simplify implementation to benefit future usage.

While at it, rename a few very generic variables to make them omap
specific. This helps us differentiate from DRA7 and AM43xx data in the
future.

NOTE: None of the platforms that use omap_l3_noc are non-device tree
anymore. So, it is safe to assume OF match here.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[nm@ti.com: split, refactor and optimize logic]
Signed-off-by: Nishanth Menon <nm@ti.com>
---
V2: reordering only.
V1: https://patchwork.kernel.org/patch/3984101/
 drivers/bus/omap_l3_noc.c |   55 +++++++++++++++++++---------------
 drivers/bus/omap_l3_noc.h |   72 ++++++++++++++++++++++++++++++++-------------
 2 files changed, 84 insertions(+), 43 deletions(-)

diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 27c6ce2..fd31d37 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -14,12 +14,14 @@
  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include <linux/module.h>
 #include <linux/init.h>
-#include <linux/io.h>
-#include <linux/platform_device.h>
 #include <linux/interrupt.h>
+#include <linux/io.h>
 #include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
 #include <linux/slab.h>
 
 #include "omap_l3_noc.h"
@@ -58,17 +60,18 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 	void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
 	char *target_name, *master_name = "UN IDENTIFIED";
 	struct l3_target_data *l3_targ_inst;
+	struct l3_masters_data *master;
 
 	/* Get the Type of interrupt */
 	inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
 
-	for (i = 0; i < L3_MODULES; i++) {
+	for (i = 0; i < l3->num_modules; i++) {
 		/*
 		 * Read the regerr register of the clock domain
 		 * to determine the source
 		 */
 		base = l3->l3_base[i];
-		err_reg = readl_relaxed(base + l3_flagmux[i] +
+		err_reg = readl_relaxed(base + l3->l3_flagmux[i] +
 					L3_FLAGMUX_REGERR0 + (inttype << 3));
 
 		/* Get the corresponding error and analyse */
@@ -79,7 +82,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 			/* We DONOT expect err_src to go out of bounds */
 			BUG_ON(err_src > MAX_CLKDM_TARGETS);
 
-			l3_targ_inst = &l3_targ[i][err_src];
+			l3_targ_inst = &l3->l3_targ[i][err_src];
 			target_name = l3_targ_inst->name;
 			l3_targ_base = base + l3_targ_inst->offset;
 
@@ -101,7 +104,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 					inttype ? "debug" : "application",
 					err_src, i, "(unclearable)");
 
-				mask_reg = base + l3_flagmux[i] +
+				mask_reg = base + l3->l3_flagmux[i] +
 					   L3_FLAGMUX_MASK0 + (inttype << 3);
 				mask_val = readl(mask_reg);
 				mask_val &= ~(1 << err_src);
@@ -131,10 +134,12 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 				break;
 
 			case CUSTOM_ERROR:
-				for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
-					if (masterid == l3_masters[k].id)
-						master_name =
-							l3_masters[k].name;
+				for (k = 0, master = l3->l3_masters;
+				     k < l3->num_masters; k++, master++) {
+					if (masterid == master->id) {
+						master_name = master->name;
+						break;
+					}
 				}
 				WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
 					master_name, target_name);
@@ -154,20 +159,34 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 	return IRQ_HANDLED;
 }
 
+static const struct of_device_id l3_noc_match[] = {
+	{.compatible = "ti,omap4-l3-noc", .data = &omap_l3_data},
+	{},
+};
+MODULE_DEVICE_TABLE(of, l3_noc_match);
+
 static int omap_l3_probe(struct platform_device *pdev)
 {
+	const struct of_device_id *of_id;
 	static struct omap_l3 *l3;
 	int ret, i;
 
+	of_id = of_match_device(l3_noc_match, &pdev->dev);
+	if (!of_id) {
+		dev_err(&pdev->dev, "OF data missing\n");
+		return -EINVAL;
+	}
+
 	l3 = devm_kzalloc(&pdev->dev, sizeof(*l3), GFP_KERNEL);
 	if (!l3)
 		return -ENOMEM;
 
+	memcpy(l3, of_id->data, sizeof(*l3));
 	l3->dev = &pdev->dev;
 	platform_set_drvdata(pdev, l3);
 
 	/* Get mem resources */
-	for (i = 0; i < L3_MODULES; i++) {
+	for (i = 0; i < l3->num_modules; i++) {
 		struct resource	*res = platform_get_resource(pdev,
 							     IORESOURCE_MEM, i);
 
@@ -199,22 +218,12 @@ static int omap_l3_probe(struct platform_device *pdev)
 	return ret;
 }
 
-#if defined(CONFIG_OF)
-static const struct of_device_id l3_noc_match[] = {
-	{.compatible = "ti,omap4-l3-noc", },
-	{},
-};
-MODULE_DEVICE_TABLE(of, l3_noc_match);
-#else
-#define l3_noc_match NULL
-#endif
-
 static struct platform_driver omap_l3_driver = {
 	.probe		= omap_l3_probe,
 	.driver		= {
 		.name		= "omap_l3_noc",
 		.owner		= THIS_MODULE,
-		.of_match_table = l3_noc_match,
+		.of_match_table = of_match_ptr(l3_noc_match),
 	},
 };
 
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 66caece..e60865f 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -17,7 +17,9 @@
 #ifndef __OMAP_L3_NOC_H
 #define __OMAP_L3_NOC_H
 
-#define L3_MODULES			3
+#define OMAP_L3_MODULES			3
+#define MAX_L3_MODULES			3
+
 #define CLEAR_STDERR_LOG		(1 << 31)
 #define CUSTOM_ERROR			0x2
 #define STANDARD_ERROR			0x0
@@ -36,8 +38,6 @@
 
 #define MAX_CLKDM_TARGETS		31
 
-#define NUM_OF_L3_MASTERS	(sizeof(l3_masters)/sizeof(l3_masters[0]))
-
 /**
  * struct l3_masters_data - L3 Master information
  * @id:		ID of the L3 Master
@@ -60,13 +60,47 @@ struct l3_target_data {
 	char *name;
 };
 
-static u32 l3_flagmux[L3_MODULES] = {
+
+/**
+ * struct omap_l3 - Description of data relevant for L3 bus.
+ * @dev:	device representing the bus (populated runtime)
+ * @l3_base:	base addresses of modules (populated runtime)
+ * @l3_flag_mux: array containing offsets to flag mux per module
+ *		 offset from corresponding module base indexed per
+ *		 module.
+ * @num_modules: number of clock domains / modules.
+ * @l3_masters:	array pointing to master data containing name and register
+ *		offset for the master.
+ * @num_master: number of masters
+ * @l3_targ:	array indexed by flagmux index (bit offset) pointing to the
+ *		target data. unsupported ones are marked with
+ *		L3_TARGET_NOT_SUPPORTED
+ * @debug_irq:	irq number of the debug interrupt (populated runtime)
+ * @app_irq:	irq number of the application interrupt (populated runtime)
+ */
+struct omap_l3 {
+	struct device *dev;
+
+	void __iomem *l3_base[MAX_L3_MODULES];
+	u32 *l3_flagmux;
+	int num_modules;
+
+	struct l3_masters_data *l3_masters;
+	int num_masters;
+
+	struct l3_target_data **l3_targ;
+
+	int debug_irq;
+	int app_irq;
+};
+
+static u32 omap_l3_flagmux[OMAP_L3_MODULES] = {
 	0x500,
 	0x1000,
 	0X0200
 };
 
-static struct l3_target_data l3_target_inst_data_clk1[MAX_CLKDM_TARGETS] = {
+static struct l3_target_data omap_l3_target_data_clk1[MAX_CLKDM_TARGETS] = {
 	{0x100,	"DMM1",},
 	{0x200,	"DMM2",},
 	{0x300,	"ABE",},
@@ -76,7 +110,7 @@ static struct l3_target_data l3_target_inst_data_clk1[MAX_CLKDM_TARGETS] = {
 	{0x900,	"L4WAKEUP",},
 };
 
-static struct l3_target_data l3_target_inst_data_clk2[MAX_CLKDM_TARGETS] = {
+static struct l3_target_data omap_l3_target_data_clk2[MAX_CLKDM_TARGETS] = {
 	{0x500,	"CORTEXM3",},
 	{0x300,	"DSS",},
 	{0x100,	"GPMC",},
@@ -100,13 +134,13 @@ static struct l3_target_data l3_target_inst_data_clk2[MAX_CLKDM_TARGETS] = {
 	{0x1700, "LLI",},
 };
 
-static struct l3_target_data l3_target_inst_data_clk3[MAX_CLKDM_TARGETS] = {
+static struct l3_target_data omap_l3_target_data_clk3[MAX_CLKDM_TARGETS] = {
 	{0x0100, "EMUSS",},
 	{0x0300, "DEBUG SOURCE",},
 	{0x0,	"HOST CLK3",},
 };
 
-static struct l3_masters_data l3_masters[] = {
+static struct l3_masters_data omap_l3_masters[] = {
 	{ 0x0 , "MPU"},
 	{ 0x10, "CS_ADP"},
 	{ 0x14, "xxx"},
@@ -134,20 +168,18 @@ static struct l3_masters_data l3_masters[] = {
 	{ 0xC8, "USBHOSTFS"}
 };
 
-static struct l3_target_data *l3_targ[L3_MODULES] = {
-	l3_target_inst_data_clk1,
-	l3_target_inst_data_clk2,
-	l3_target_inst_data_clk3,
+static struct l3_target_data *omap_l3_targ[OMAP_L3_MODULES] = {
+	omap_l3_target_data_clk1,
+	omap_l3_target_data_clk2,
+	omap_l3_target_data_clk3,
 };
 
-struct omap_l3 {
-	struct device *dev;
-
-	/* memory base */
-	void __iomem *l3_base[L3_MODULES];
-
-	int debug_irq;
-	int app_irq;
+static const struct omap_l3 omap_l3_data = {
+	.l3_flagmux = omap_l3_flagmux,
+	.num_modules = OMAP_L3_MODULES,
+	.l3_masters = omap_l3_masters,
+	.num_masters = ARRAY_SIZE(omap_l3_masters),
+	.l3_targ = omap_l3_targ,
 };
 
 #endif	/* __OMAP_L3_NOC_H */
-- 
1.7.9.5


  parent reply	other threads:[~2014-04-17 20:51 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-14 16:25 [PATCH 00/15] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Nishanth Menon
2014-04-14 16:25 ` [PATCH 01/15] bus: omap_l3_noc: Fix copyright information Nishanth Menon
2014-04-14 16:25 ` [PATCH 02/15] bus: omap_l3_noc: switched over to relaxed variants of readl/writel Nishanth Menon
2014-04-14 16:27   ` Nishanth Menon
2014-04-14 16:25 ` [PATCH 02/15] bus: omap_l3_noc: switch " Nishanth Menon
2014-04-14 16:25 ` [PATCH 03/15] bus: omap_l3_noc: un-obfuscate l3_targ address computation Nishanth Menon
2014-04-14 16:25 ` [PATCH 04/15] bus: omap_l3_noc: move L3 master data structure out Nishanth Menon
2014-04-14 16:25 ` [PATCH 05/15] bus: omap_l3_noc: convert target information into a structure Nishanth Menon
2014-04-14 16:25 ` [PATCH 06/15] bus: omap_l3_noc: make error reporting and handling common Nishanth Menon
2014-04-14 16:25 ` [PATCH 07/15] bus: omap_l3_noc: populate l3->dev and use it Nishanth Menon
2014-04-14 16:25 ` [PATCH 08/15] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Nishanth Menon
2014-04-14 16:25 ` [PATCH 09/15] bus: omap_l3_noc: rename functions and data to omap_l3 Nishanth Menon
2014-04-14 16:25 ` [PATCH 10/15] bus: omap_l3_noc: remove iclk from omap_l3 struct Nishanth Menon
2014-04-14 16:25 ` [PATCH 11/15] bus: omap_l3_noc: use of_match_data to pick up SoC information Nishanth Menon
2014-04-14 16:25 ` [PATCH 12/15] bus: omap_l3_noc: convert flagmux information into a structure Nishanth Menon
2014-04-14 16:25 ` [PATCH 13/15] bus: omap_l3_noc: introduce concept of submodule Nishanth Menon
2014-04-14 16:25 ` [PATCH 14/15] bus: omap_l3_noc: Add DRA7 interconnect error data Nishanth Menon
2014-04-14 16:25 ` [PATCH 15/15] bus: omap_l3_noc: Add AM4372 " Nishanth Menon
2014-04-17 20:49 ` [PATCH V2 00/19] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 01/19] bus: omap_l3_noc: Fix copyright information Nishanth Menon
2014-04-17 20:51     ` Santosh Shilimkar
2014-04-17 20:49   ` [PATCH V2 02/19] bus: omap_l3_noc: rename functions and data to omap_l3 Nishanth Menon
2014-04-17 20:52     ` Santosh Shilimkar
2014-04-17 20:49   ` [PATCH V2 03/19] bus: omap_l3_noc: remove iclk from omap_l3 struct Nishanth Menon
2014-04-17 20:52     ` Santosh Shilimkar
2014-04-17 20:49   ` [PATCH V2 04/19] bus: omap_l3_noc: populate l3->dev and use it Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 05/19] bus: omap_l3_noc: switch over to relaxed variants of readl/writel Nishanth Menon
2014-04-17 21:52     ` Felipe Balbi
2014-04-17 21:56       ` Santosh Shilimkar
2014-04-17 22:03         ` Felipe Balbi
2014-04-21 13:16           ` Nishanth Menon
2014-04-21 15:09             ` Felipe Balbi
2014-04-21 15:31               ` Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 06/19] bus: omap_l3_noc: un-obfuscate l3_targ address computation Nishanth Menon
2014-04-17 22:00     ` Felipe Balbi
2014-04-21 13:08       ` Nishanth Menon
2014-04-21 15:11         ` Felipe Balbi
2014-04-17 20:49   ` [PATCH V2 07/19] bus: omap_l3_noc: move L3 master data structure out Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 08/19] bus: omap_l3_noc: convert target information into a structure Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 09/19] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Nishanth Menon
2014-04-17 20:49   ` Nishanth Menon [this message]
2014-04-17 20:49   ` [PATCH V2 11/19] bus: omap_l3_noc: convert flagmux information into a structure Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 12/19] bus: omap_l3_noc: fix masterid detection Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 13/19] bus: omap_l3_noc: make error reporting and handling common Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 14/19] bus: omap_l3_noc: improve readability by using helper for slave event parsing Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 15/19] bus: omap_l3_noc: add information about the type of operation Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 16/19] bus: omap_l3_noc: Add information about the context " Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 17/19] bus: omap_l3_noc: introduce concept of submodule Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 18/19] bus: omap_l3_noc: Add DRA7 interconnect error data Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 19/19] bus: omap_l3_noc: Add AM4372 " Nishanth Menon
2014-04-17 20:57   ` [PATCH V2 00/19] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Santosh Shilimkar
2014-04-17 21:00     ` Nishanth Menon
2014-04-24  8:55       ` Peter Ujfalusi
2014-04-24 14:19         ` Nishanth Menon
2014-04-25  6:27           ` Peter Ujfalusi
2014-04-25 13:44             ` Nishanth Menon
2014-04-24 16:25         ` Tony Lindgren
2014-04-24 16:31           ` Nishanth Menon
2014-04-24 15:54   ` Darren Etheridge
2014-04-24 16:06     ` Nishanth Menon
2014-04-28 15:14 ` [PATCH V3 00/20] " Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 01/20] bus: omap_l3_noc: Fix copyright information Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 02/20] bus: omap_l3_noc: rename functions and data to omap_l3 Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 03/20] bus: omap_l3_noc: remove iclk from omap_l3 struct Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 04/20] bus: omap_l3_noc: populate l3->dev and use it Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 05/20] bus: omap_l3_noc: switch over to relaxed variants of readl/writel Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 06/20] bus: omap_l3_noc: un-obfuscate l3_targ address computation Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 07/20] bus: omap_l3_noc: move L3 master data structure out Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 08/20] bus: omap_l3_noc: convert target information into a structure Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 09/20] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 10/20] bus: omap_l3_noc: use of_match_data to pick up SoC information Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 11/20] bus: omap_l3_noc: convert flagmux information into a structure Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 12/20] bus: omap_l3_noc: fix masterid detection Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 13/20] bus: omap_l3_noc: make error reporting and handling common Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 14/20] bus: omap_l3_noc: improve readability by using helper for slave event parsing Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 15/20] bus: omap_l3_noc: ignore masked out unclearable targets Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 16/20] bus: omap_l3_noc: add information about the type of operation Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 17/20] bus: omap_l3_noc: Add information about the context " Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 18/20] bus: omap_l3_noc: introduce concept of submodule Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 19/20] bus: omap_l3_noc: Add DRA7 interconnect error data Nishanth Menon
2014-04-28 15:15   ` [PATCH V3 20/20] bus: omap_l3_noc: Add AM4372 " Nishanth Menon
2014-04-29 13:42   ` [PATCH V3 00/20] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Sekhar Nori
2014-05-05 20:03   ` [GIT PULL #1/2] bus: omap_l3_noc: driver fixes and DRA7/AM437x support Nishanth Menon
2014-05-05 20:06     ` [GIT PULL #2/2] ARM: dts: DRA7/AM437x l3noc dts updates Nishanth Menon
2014-05-08 15:04       ` Tony Lindgren
2014-05-08 15:03     ` [GIT PULL #1/2] bus: omap_l3_noc: driver fixes and DRA7/AM437x support Tony Lindgren

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1397767775-10965-11-git-send-email-nm@ti.com \
    --to=nm@ti.com \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-omap@vger.kernel.org \
    --cc=nsekhar@ti.com \
    --cc=peter.ujfalusi@ti.com \
    --cc=r.sricharan@ti.com \
    --cc=rnayak@ti.com \
    --cc=santosh.shilimkar@ti.com \
    --cc=tony@atomide.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

Powered by JetHome